| 1 | /* |
| 2 | |
| 3 | FPS.ino |
| 4 | |
| 5 | Frames Per Second: Display Performance Test |
| 6 | |
| 7 | >>> Before compiling: Please remove comment from the constructor of the |
| 8 | >>> connected graphics display (see below). |
| 9 | |
| 10 | Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/) |
| 11 | |
| 12 | Copyright (c) 2016, olikraus@gmail.com |
| 13 | All rights reserved. |
| 14 | |
| 15 | Redistribution and use in source and binary forms, with or without modification, |
| 16 | are permitted provided that the following conditions are met: |
| 17 | |
| 18 | * Redistributions of source code must retain the above copyright notice, this list |
| 19 | of conditions and the following disclaimer. |
| 20 | |
| 21 | * Redistributions in binary form must reproduce the above copyright notice, this |
| 22 | list of conditions and the following disclaimer in the documentation and/or other |
| 23 | materials provided with the distribution. |
| 24 | |
| 25 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND |
| 26 | CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, |
| 27 | INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 28 | MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 29 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR |
| 30 | CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 31 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 32 | NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 33 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| 34 | CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
| 35 | STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 36 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF |
| 37 | ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 38 | |
| 39 | |
| 40 | |
| 41 | ============== |
| 42 | U8glib |
| 43 | |
| 44 | ST7920_192X32, SPI: FPS: Box=7.6 @=9.8 iFPS: Box=11.4 @=14.7 |
| 45 | ST7920_192X32, 8Bit: FPS: Box=6.2 @=7.5 iFPS: Box=9.3 @=11.2 |
| 46 | DOGM128 SW SPI: FPS: Box=5.1 @=5.9 Pix=2.6 iFPS: Box=10.2 @=11.8 Pix=5.2 |
| 47 | DOGM128 HW SPI: FPS: Box=5.5 @=6.3 iFPS: Box=11.0 @=12.6 |
| 48 | DOGXL160 SW SPI: FPS: Box=1.7 @=1.9 iFPS: Box=6.9 @=7.7 |
| 49 | DOGXL160 HW SPI: FPS: Box=1.8 @=2.1 |
| 50 | |
| 51 | NHD27OLED_BW, SW SPI: FPS: Box=3.0 @=3.7 |
| 52 | NHD27OLED_BW, HW SPI: FPS: Box=3.5 @=4.5 |
| 53 | NHD27OLED_2X_BW, SW SPI: FPS: Box=3.8 @=4.9 |
| 54 | NHD27OLED_2X_BW, HW SPI: FPS: Box=4.6 @=6.4 |
| 55 | |
| 56 | 30 Sep 2012 |
| 57 | NHD27OLED_BW, SW SPI: FPS: Clip=9.2 Box=3.9 @=4.4 NEW_CODE |
| 58 | NHD27OLED_BW, SW SPI: FPS: Clip=9.2 Box=3.6 @=4.5 |
| 59 | NHD27OLED_BW, HW SPI: FPS: Clip=16.3 Box=4.7 @=5.6 |
| 60 | NHD27OLED_2X_BW, SW SPI: FPS: Clip=9.7 Box=4.5 @=5.8 |
| 61 | NHD27OLED_2X_BW, SW SPI: FPS: Clip=18.0 Box=5.8 @=7.9 |
| 62 | |
| 63 | 1 Oct 2012 |
| 64 | ST7920_192X32, 8Bit: FPS: Box=7.2 @=10.0 |
| 65 | DOGM128 SW SPI: FPS: Box=5.2 @=6.6 Pix=2.6 |
| 66 | DOGM128 HW SPI: FPS: Clip=33.2 Box=5.5 @=7.1 |
| 67 | DOGXL160 SW SPI: FPS: Box=1.7 @=2.0 |
| 68 | DOGXL160 HW SPI: FPS: Box=1.8 @=2.2 |
| 69 | |
| 70 | DOGXL160 GR SW SPI: FPS: Box=1.1 @=1.3 |
| 71 | |
| 72 | 1 Mar 2013 |
| 73 | ST7920_192X32_1X, SPI: FPS: Clip=10.3 Box=5.5 @=7.2 Pix=3.9 |
| 74 | ST7920_192X32_4X, SPI: FPS: Clip=10.9 Box=6.7 @=8.8 Pix=7.4 |
| 75 | ST7920_192X32_1X, 8Bit: FPS: Clip=14.2 Box=6.1 @=8.4 Pix=4.2 |
| 76 | ST7920_192X32_4X, 8Bit: FPS: Clip=14.2 Box=7.8 @=10.7 Pix=8.7 |
| 77 | ST7920_192X32_1X, HW SPI: FPS: Clip=14.2 Box=6.3 @=8.7 Pix=4.3 |
| 78 | ST7920_192X32_4X, HW SPI: FPS: Clip=15.3 Box=8.0 @=11.2 Pix=9.0 |
| 79 | |
| 80 | 2 Jun 2013 |
| 81 | U8GLIB_DOGM128 SW SPI: FPS: Clip=23.9 Box=4.5 @=6.6 Pix=2.1 |
| 82 | U8GLIB_DOGM128_2X SW SPI: FPS: Clip=28.5 Box=6.6 @=9.7 Pix=3.9 |
| 83 | U8GLIB_DOGM128_2X HW SPI: FPS: Clip=40.8 Box=7.1 @=10.8 Pix=4.1 |
| 84 | |
| 85 | 3 Jun 2013 |
| 86 | U8GLIB_ST7920_192X32_1X -Os SW SPI FPS: Clip=11.0 Box=5.4 @=7.1 Pix=3.9 Size=11828 |
| 87 | U8GLIB_ST7920_192X32_1X -O3 SW SPI FPS: Clip=10.9 Box=5.6 @=7.5 Pix=4.0 Size=13800 |
| 88 | U8GLIB_ST7920_192X32_1X -Os SW SPI FPS: Clip=16.8 Box=6.7 @=9.6 Pix=4.5 Size=11858 (new seq data output) |
| 89 | U8GLIB_ST7920_192X32_1X -Os HW SPI FPS: Clip=25.7 Box=7.5 @=11.3 Pix=4.8 (new seq data output) |
| 90 | |
| 91 | 6 Jun 2013 |
| 92 | U8GLIB_DOGS102 u8g(13, 11, 10, 9); STD SW SPI FPS: Clip=9.5 Box=7.6 @=8.2 Pix=6.2 Size=15652 |
| 93 | U8GLIB_DOGS102 u8g(13, 11, 10, 9); SW SPI FPS: Clip=19.1 Box=12.8 @=14.0 Pix=9.2 Size=15532 |
| 94 | |
| 95 | |
| 96 | 12 Jun 2013 |
| 97 | SSD1351_128X128_332 SW SPI Clip=1.3 Box=0.7 @=0.9 Pix=0.4 |
| 98 | SSD1351_128X128_332 HW SPI Clip=3.6 Box=1.1 @=1.5 Pix=0.5 |
| 99 | |
| 100 | 24 Jun 2013 |
| 101 | Uno SSD1351_128X128_332 SW SPI Clip=1.4 Box=0.8 @=0.9 Pix=0.4 |
| 102 | |
| 103 | Uno SSD1351_128X128_332 HW SPI Clip=4.4 Box=1.2 @=1.6 Pix=0.5 |
| 104 | Uno SSD1351_128X128_HICOLOR HW SPI Clip=3.7 Box=0.8 @=1.0 Pix=0.3 |
| 105 | |
| 106 | Mega2560 SSD1351_128X128_332 HW SPI Clip=4.4 Box=1.2 @=1.6 Pix=0.5 |
| 107 | Mega2560 SSD1351_128X128_4X_332 HW SPI Clip=4.6 Box=2.3 @=2.8 Pix=1.5 |
| 108 | Mega2560 SSD1351_128X128_HICOLOR HW SPI Clip=3.6 Box=0.8 @=1.0 Pix=0.3 |
| 109 | Mega2560 SSD1351_128X128_4X_HICOLOR HW SPI Clip=4.2 Box=1.7 @=2.1 Pix=1.0 |
| 110 | |
| 111 | Due SSD1351_128X128_332 HW SPI Clip=24.6 Box=6.3 @=7.8 Pix=2.8 |
| 112 | Due SSD1351_128X128_4X_332 HW SPI Clip=28.1 Box=13.0 @=15.1 Pix=8.5 |
| 113 | Due SSD1351_128X128_HICOLOR HW SPI Clip=20.8 Box=3.4 @=4.5 Pix=1.4 |
| 114 | Due SSD1351_128X128_4X_HICOLOR HW SPI Clip=26.3 Box=8.9 @=11.1 Pix=4.8 |
| 115 | |
| 116 | Due SSD1351_128X128_4X_HICOLOR SW SPI Clip=0.4 Box=0.4 @=0.4 Pix=0.4 |
| 117 | |
| 118 | Due DOGS102 u8g(13, 11, 10, 9); SW SPI FPS: Clip=19.1 Box=13.1 @=14.3 Pix=9.4 |
| 119 | Due DOGS102 u8g(10, 9); HW SPI FPS: Clip=128.9 Box=30.7 @=40.6 Pix=15.4 |
| 120 | |
| 121 | Due NHD27OLED_BW u8g(10, 9) HW SPI FPS: Clip=53.0 Box=19.6 @=23.8 Pix=10.6 |
| 122 | Due NHD27OLED_2X_BW u8g(10, 9) HW SPI FPS: Clip=57.0 Box=25.3 @=31.7 Pix=18.1 |
| 123 | Due NHD27OLED_GR u8g(10, 9) HW SPI FPS: Clip=34.1 Box=11.7 @=13.7 Pix=5.6 |
| 124 | Due NHD27OLED_2X_GR u8g(10, 9) HW SPI FPS: Clip=38.1 Box=15.5 @=20.0 Pix=8.8 |
| 125 | |
| 126 | |
| 127 | 28. Apr 2016 |
| 128 | Uno DOGS102 u8g(13, 11, 10, 9); SW SPI FPS: Clip=26.6 Box=6.1 @=8.5 Pix=2.8 11548 Bytes |
| 129 | Uno DOGS102 u8g(10, 9); HW SPI FPS: Clip=33.1 Box=6.4 @=9.1 Pix=2.9 11366 Bytes |
| 130 | |
| 131 | ============== |
| 132 | U8g2 |
| 133 | |
| 134 | 28. Apr 2016 |
| 135 | Uno DOGS102 u8g(13, 11, 10, 9); SW SPI FPS: Clip=3.0 Box=3.3 @=2.1 Pix=2.4 11472 Bytes |
| 136 | Uno DOGS102 u8g(10, 9); HW SPI FPS: Clip=24.5 Box=87.4 @=5.0 Pix=7.3 11554 Bytes |
| 137 | |
| 138 | 15. Mai 2016 |
| 139 | Uno U8G2_UC1701_DOGS102_1_4W_SW_SPI SW SPI FPS: Clip=3.5 Box=3.8 @=2.3 Pix=2.7 Arduino Flash Size: 13262 Bytes |
| 140 | Uno U8G2_UC1701_DOGS102_1_4W_HW_SPI HW SPI FPS: Clip=26.3 Box=90.5 @=5.1 Pix=8.5 Arduino Flash Size: 13370 Bytes |
| 141 | Uno U8G2_UC1701_DOGS102_F_4W_HW_SPI HW SPI FPS: Clip=50.6 Box=119.6 @=9.4 Pix=15.7 Arduino Flash Size: 13370 Bytes |
| 142 | |
| 143 | 16. Mai 2016 (improved SW 4-Wire SPI) |
| 144 | Uno U8G2_UC1701_DOGS102_1_4W_SW_SPI SW SPI FPS: Clip=18.6 Box=42.2 @=4.7 Pix=7.7 |
| 145 | |
| 146 | 24. Mai 2016 |
| 147 | Uno U8G2_ST7565_DOGM128_1_4W_SW_SPI SW SPI FPS: Clip=18.1 Box=35.8 @=3.9 Pix=6.2 |
| 148 | Uno U8G2_ST7565_DOGM128_1_4W_HW_SPI HW SPI FPS: Clip=25.4 Box=78.7 @=4.2 Pix=6.9 |
| 149 | |
| 150 | 25. June 2016 |
| 151 | U8G2_SSD1306_128X64_NONAME_F_4W_HW_SPI HW SPI FPS: Clip=56.4 Box=114.1 @=8.6 Pix=12.9 |
| 152 | U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI HW SPI FPS: Clip=27.7 Box=87.7 @=4.3 Pix=7.1 |
| 153 | |
| 154 | 18. Aug 2016 |
| 155 | U8G2_ST7920_128X64_1_HW_SPI Uno FPS: Clip=13.2 Box=11.5 @=3.7 Pix=5.9 |
| 156 | U8G2_ST7920_128X64_1_SW_SPI Uno FPS: Clip=1.2 Box=1.2 @=0.9 Pix=1.1 |
| 157 | |
| 158 | U8G2_ST7920_128X64_1_SW_SPI Due FPS: Clip=3.1 Box=3.1 @=2.8 Pix=2.9 |
| 159 | U8G2_ST7920_128X64_1_HW_SPI Due FPS: Clip=26.2 Box=25.8 @=13.9 Pix=15.3 |
| 160 | |
| 161 | |
| 162 | U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI Uno Clip=12.6 Box=19.1 @=3.6 Pix=5.8 |
| 163 | U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI Uno Clip=15.1 Box=23.3 @=3.6 Pix=5.8 with graphics acceleration |
| 164 | |
| 165 | Issue #79: |
| 166 | U8G2_SSD1306_128X32_UNIVISION_1_HW_I2C Atmega32U8 Clip=15.7 Box=26.6 @=5.3 Pix=8.4 |
| 167 | |
| 168 | 26.Nov 2016 |
| 169 | U8G2_ST7920_128X64_1_8080 Uno Clip=13.5 Box=12.1 @=3.6 Pix=5.9 atmega&arduino optimized |
| 170 | U8G2_ST7920_128X64_1_SW_SPI Uno Clip=13.2 Box=11.4 @=3.5 Pix=5.6 issue 87 |
| 171 | U8G2_SSD1306_128X64_NONAME_1_4W_SW_SPI Uno Clip=21.7 Box=46.8 @=4.0 Pix=7.1 |
| 172 | U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI Uno Clip=25.8 Box=84.2 @=4.2 Pix=7.8 |
| 173 | U8G2_SSD1306_128X64_NONAME_1_8080 Uno Clip=16.1 Box=29.1 @=3.9 Pix=6.6 |
| 174 | U8G2_SSD1306_128X64_NONAME_1_6800 Uno Clip=6.8 Box=8.4 @=2.9 Pix=4.3 6800 mode is not yet optimized for Atmega |
| 175 | |
| 176 | 7 Dec 2016 |
| 177 | U8G2_KS0108_128X64_1 Uno Clip=6.7 Box=8.2 @=2.9 Pix=4.3 |
| 178 | |
| 179 | 11 Dec 2016 |
| 180 | U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI Uno Clip=25.8 Box=84.2 @=4.2 Pix=7.8 Old: no pixel optimization |
| 181 | U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI Uno Clip=25.9 Box=84.1 @=4.3 Pix=8.3 Pixel (len=1) optimization |
| 182 | |
| 183 | 14 Dec 2016 |
| 184 | U8G2_KS0108_128X64_1 Uno Clip=15.9 Box=28.0 @=3.9 Pix=6.9 |
| 185 | |
| 186 | 31 Dec 2016 |
| 187 | U8G2_LC7981_160X80_1_6800 Uno Clip=3.3 Box=3.0 @=1.5 Pix=2.1 |
| 188 | |
| 189 | 14 Jan 2017 |
| 190 | U8G2_ST7920_128X64_1_HW_SPI Uno Clip=16.3 Box=20.2 @=4.1 Pix=7.2 |
| 191 | U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI Uno Clip=31.7 Box=77.2 @=4.7 Pix=8.9 |
| 192 | |
| 193 | 11 Mar 2017 |
| 194 | before |
| 195 | U8G2_ST7920_128X64_1_SW_SPI Uno Clip=16.0 Box=18.5 @=4.0 Pix=6.8 issue 200 |
| 196 | U8G2_ST7920_128X64_1_HW_SPI Uno Clip=16.3 Box=20.2 @=4.1 Pix=7.2 issue 200 |
| 197 | |
| 198 | after |
| 199 | U8G2_ST7920_128X64_1_SW_SPI Uno Clip=17.2 Box=20.2 @=4.1 Pix=7.0 issue 200 |
| 200 | U8G2_ST7920_128X64_1_HW_SPI Uno Clip=17.4 Box=21.8 @=4.2 Pix=7.4 issue 200 |
| 201 | |
| 202 | 14 May 2017, Arduino 1.8 |
| 203 | U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI Uno 4MHz Clip=31.7 Box=77.2 @=4.7 Pix=8.9 issue 215 |
| 204 | U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI Uno 8MHz Clip=32.9 Box=84.1 @=4.7 Pix=9.0 issue 215 |
| 205 | |
| 206 | U8G2_ST7565_EA_DOGM128_1_4W_HW_SPI Uno 4MHz Clip=32.0 Box=78.5 @=4.7 Pix=8.9 issue 215 |
| 207 | |
| 208 | U8G2_SSD1322_NHD_256X64_1_4W_HW_SPI Uno 8MHz 16 Bit Clip=9.0 Box=10.7 @=2.0 Pix=3.0 issue 302 before optimization |
| 209 | U8G2_SSD1322_NHD_256X64_1_4W_HW_SPI Uno 10MHz 16 Bit Clip=10.9 Box=13.5 @=2.0 Pix=3.2 issue 302 after optimization (runs with 8MHz) |
| 210 | |
| 211 | U8G2_SSD1327_SEEED_96X96_1_HW_I2C Uno Clip=1.2 Box=1.2 @=0.9 Pix=1.0 issue 302 before optimization |
| 212 | U8G2_SSD1327_SEEED_96X96_1_HW_I2C Uno Clip=1.4 Box=1.4 @=1.0 Pix=1.2 issue 302 after optimization |
| 213 | |
| 214 | U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI Uno Clip=18.2 Box=25.1 @=4.0 Pix=6.7 issue 302 before optimization |
| 215 | U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI Uno Clip=19.1 Box=28.3 @=4.1 Pix=7.2 issue 302 after optimization |
| 216 | |
| 217 | 15 Aug 2017, Arduino 1.8.3 |
| 218 | U8G2_SSD1306_128X64_NONAME_1_HW_I2C MKR Zero Clip=20.8 Box=24.1 @=9.9 Pix=11.4 |
| 219 | |
| 220 | 05 Sep 2017, Arduino 1.8,0 |
| 221 | U8G2_SH1106_128X64_NONAME_1_HW_I2C Uno Clip=13.6 Box=19.4 @=3.8 Pix=5.9 |
| 222 | |
| 223 | 6 Oct 2017, Arduino 1.8.4 |
| 224 | U8G2_SSD1306_128X64_NONAME_1_SW_I2C EPS32 Clip=9.5 Box=9.6 @=8.9 Pix=9.1 |
| 225 | U8G2_SSD1306_128X64_NONAME_1_HW_I2C EPS32 Clip=30.5 Box=31.3 @=24.7 Pix=26.7 |
| 226 | |
| 227 | 9 Mar 2018, Arduino 1.8.4, 16 Bit Mode |
| 228 | U8G2_ST75256_JLX256128_1_4W_SW_SPI MKR Zero Clip=2.0 Box=2.0 @=1.2 Pix=1.3 |
| 229 | U8G2_ST75256_JLX256128_1_4W_HW_SPI MKR Zero Clip=30.3 Box=31.0 @=2.6 Pix=2.9 |
| 230 | |
| 231 | 23 Apr 2018, Arduino 1.8.4, 8 Bit Mode |
| 232 | U8G2_SSD1306_128X64_NONAME_1_3W_SW_SPI Uno Clip=2.7 Box=2.9 @=1.8 Pix=2.2 |
| 233 | |
| 234 | 29 Apr 2018, Arduino 1.8.4, 8 Bit Mode |
| 235 | U8G2_SSD1306_128X64_NONAME_1_SW_I2C Uno Clip=1.8 Box=1.9 @=1.4 Pix=1.6 issue 593, before optimization |
| 236 | U8G2_SSD1306_128X64_NONAME_1_SW_I2C Uno Clip=4.9 Box=5.3 @=2.6 Pix=3.6 issue 593, after optimization, however, disabled by default |
| 237 | |
| 238 | U8G2_SSD1306_128X64_NONAME_1_3W_SW_SPI Uno Clip=2.7 Box=2.9 @=1.8 Pix=2.2 issue 586, before optimization |
| 239 | U8G2_SSD1306_128X64_NONAME_1_3W_SW_SPI Uno Clip=23.4 Box=40.8 @=4.4 Pix=8.1 issue 586, after optimization |
| 240 | |
| 241 | |
| 242 | 28 Oct 2018, Arduino 1.8.4, 8 Bit Mode |
| 243 | U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI Uno Clip=34.0 Box=88.4 @=4.5 Pix=8.2 issue 364, clip window |
| 244 | |
| 245 | U8G2_SSD1306_128X32_UNIVISION_1_HW_I2C Uno Clip=28.4 Box=39.2 @=10.0 Pix=14.9 I2C default |
| 246 | U8G2_SSD1306_128X32_UNIVISION_1_HW_I2C Uno Clip=32.9 Box=48.3 @=10.5 Pix=16.1 I2C default, u8g2.setBusClock(600000UL) |
| 247 | |
| 248 | U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI Uno Clip=33.9 Box=88.2 @=4.5 Pix=8.2 SPI default speed |
| 249 | U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI Uno Clip=32.8 Box=80.6 @=4.5 Pix=8.2 SPI default speed u8g2.setBusClock(6000000UL); |
| 250 | U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI Uno Clip=33.9 Box=88.2 @=4.5 Pix=8.2 SPI default speed u8g2.setBusClock(9000000UL); |
| 251 | |
| 252 | 2 Dez 2018, Arduino 1.8.4 |
| 253 | U8G2_UC1610_EA_DOGXL160_1_4W_SW_SPI Due Clip=15.8 Box=16.9 @=6.3 Pix=6.4 |
| 254 | U8G2_UC1610_EA_DOGXL160_1_4W_SW_SPI Due Clip=17.6 Box=19.2 @=6.4 Pix=6.8 issue 749 (atomic writes) |
| 255 | |
| 256 | 22 Apr 2019, Arduino 1.8.4 |
| 257 | U8G2_SH1107_SEEED_128X128_1_HW_I2C Uno Clip=4.9 Box=5.4 @=1.2 Pix=2.0 This is much faster than the older U8G2_SSD1327_SEEED_96X96_1_HW_I2C |
| 258 | |
| 259 | |
| 260 | 27 Jan 2020, Arduino 1.8.4 |
| 261 | U8G2_SSD1306_128X64_NONAME_1_3W_SW_SPI Uno Clip=23.9 Box=41.6 @=4.3 Pix=7.5 |
| 262 | U8G2_SSD1306_128X64_NONAME_1_3W_HW_SPI Uno Clip=28.4 Box=58.4 @=4.4 Pix=7.9 |
| 263 | |
| 264 | 26 Oct 2020, Arduino 18.4 |
| 265 | U8G2_SH1122_256X64_1_4W_HW_SPI, 16 Bit Uno Clip=9.9 Box=10.1 @=2.2 Pix=3.5 |
| 266 | |
| 267 | 5 Mar 2022, Arduino 1.8.4 |
| 268 | U8G2_SH1106_128X64_NONAME_1_HW_I2C Uno,u8x8_cad_ssd13xx_i2c Clip=14.0 Box=18.8 @=3.8 Pix=6.1 |
| 269 | U8G2_SH1106_128X64_NONAME_1_HW_I2C Uno,u8x8_cad_ssd13xx_fast_i2c Clip=14.5 Box=19.6 @=3.8 Pix=6.2 |
| 270 | |
| 271 | |
| 272 | */ |
| 273 | |
| 274 | |
| 275 | #include <Arduino.h> |
| 276 | #include <U8g2lib.h> |
| 277 | |
| 278 | #ifdef U8X8_HAVE_HW_SPI |
| 279 | #include <SPI.h> |
| 280 | #endif |
| 281 | #ifdef U8X8_HAVE_HW_I2C |
| 282 | #include <Wire.h> |
| 283 | #endif |
| 284 | |
| 285 | // Please UNCOMMENT one of the contructor lines below |
| 286 | // U8g2 Contructor List (Picture Loop Page Buffer) |
| 287 | // The complete list is available here: https://github.com/olikraus/u8g2/wiki/u8g2setupcpp |
| 288 | // Please update the pin numbers according to your setup. Use U8X8_PIN_NONE if the reset pin is not connected |
| 289 | //U8G2_NULL u8g2(U8G2_R0); // null device, a 8x8 pixel display which does nothing |
| 290 | //U8G2_SSD1306_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 291 | //U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 12, /* dc=*/ 4, /* reset=*/ 6); // Arduboy (Production, Kickstarter Edition) |
| 292 | //U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 293 | //U8G2_SSD1306_128X64_NONAME_1_3W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* reset=*/ 8); |
| 294 | //U8G2_SSD1306_128X64_NONAME_1_3W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* reset=*/ 8); |
| 295 | //U8G2_SSD1306_128X64_NONAME_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); |
| 296 | //U8G2_SSD1306_128X64_ALT0_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // same as the NONAME variant, but may solve the "every 2nd line skipped" problem |
| 297 | //U8G2_SSD1306_128X64_NONAME_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* reset=*/ 8); |
| 298 | //U8G2_SSD1306_128X64_NONAME_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // All Boards without Reset of the Display |
| 299 | //U8G2_SSD1306_128X64_NONAME_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ 16, /* data=*/ 17, /* reset=*/ U8X8_PIN_NONE); // ESP32 Thing, pure SW emulated I2C |
| 300 | //U8G2_SSD1306_128X64_NONAME_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE, /* clock=*/ 16, /* data=*/ 17); // ESP32 Thing, HW I2C with pin remapping |
| 301 | //U8G2_SSD1306_128X64_NONAME_1_6800 u8g2(U8G2_R0, 13, 11, 2, 3, 4, 5, 6, A4, /*enable=*/ 7, /*cs=*/ 10, /*dc=*/ 9, /*reset=*/ 8); |
| 302 | //U8G2_SSD1306_128X64_NONAME_1_8080 u8g2(U8G2_R0, 13, 11, 2, 3, 4, 5, 6, A4, /*enable=*/ 7, /*cs=*/ 10, /*dc=*/ 9, /*reset=*/ 8); |
| 303 | //U8G2_SSD1306_128X64_VCOMH0_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // same as the NONAME variant, but maximizes setContrast() range |
| 304 | //U8G2_SSD1306_128X64_ALT0_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // same as the NONAME variant, but may solve the "every 2nd line skipped" problem |
| 305 | //U8G2_SSD1306_102X64_EA_OLEDS102_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // same as the NONAME variant, but may solve the "every 2nd line skipped" problem |
| 306 | //U8G2_SSD1312_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 307 | //U8G2_SSD1312_128X64_NONAME_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ 8); |
| 308 | //U8G2_SSD1312_128X64_NONAME_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ 8); |
| 309 | //U8G2_SSD1312_120X28_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 310 | //U8G2_SSD1312_120X28_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ 8); |
| 311 | //U8G2_SSD1312_120X28_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ 8); |
| 312 | //U8G2_SH1106_128X64_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 313 | //U8G2_SH1106_128X64_NONAME_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); |
| 314 | //U8G2_SH1106_128X64_VCOMH0_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // same as the NONAME variant, but maximizes setContrast() range |
| 315 | //U8G2_SH1106_128X64_WINSTAR_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // same as the NONAME variant, but uses updated SH1106 init sequence |
| 316 | //U8G2_SH1106_128X32_VISIONOX_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); |
| 317 | //U8G2_SH1106_128X32_VISIONOX_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 318 | //U8G2_SH1106_72X40_WISE_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 319 | //U8G2_SH1107_64X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 320 | //U8G2_SH1107_128X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 321 | //U8G2_SH1107_128X128_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ 8); |
| 322 | //U8G2_SH1107_128X80_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ 8); |
| 323 | //U8G2_SH1107_PIMORONI_128X128_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ 8); |
| 324 | //U8G2_SH1107_SEEED_128X128_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); |
| 325 | //U8G2_SH1107_SEEED_128X128_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); |
| 326 | //U8G2_SH1107_SEEED_96X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 327 | //U8G2_SH1107_HJR_OEL1M0201_96X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 328 | //U8G2_SH1107_TK078F288_80X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 329 | //U8G2_SH1108_128X160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 330 | //U8G2_CH1120_128X160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 331 | //U8G2_SH1108_160X160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 332 | //U8G2_SH1122_256X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Enable U8G2_16BIT in u8g2.h |
| 333 | //U8G2_SH1122_256X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Enable U8G2_16BIT in u8g2.h |
| 334 | //U8G2_SSD1306_128X32_UNIVISION_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ 21, /* data=*/ 20, /* reset=*/ U8X8_PIN_NONE); // Adafruit Feather M0 Basic Proto + FeatherWing OLED |
| 335 | //U8G2_SSD1306_128X32_UNIVISION_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Adafruit Feather ESP8266/32u4 Boards + FeatherWing OLED |
| 336 | //U8G2_SSD1306_128X32_UNIVISION_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Adafruit ESP8266/32u4/ARM Boards + FeatherWing OLED |
| 337 | //U8G2_SSD1306_128X32_UNIVISION_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE, /* clock=*/ SCL, /* data=*/ SDA); // pin remapping with ESP8266 HW I2C |
| 338 | //U8G2_SSD1306_128X32_WINSTAR_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE, /* clock=*/ SCL, /* data=*/ SDA); // pin remapping with ESP8266 HW I2C |
| 339 | //U8G2_SSD1306_64X48_ER_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // EastRising 0.66" OLED breakout board, Uno: A4=SDA, A5=SCL, 5V powered |
| 340 | //U8G2_SSD1306_48X64_WINSTAR_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); |
| 341 | //U8G2_SSD1306_64X32_NONAME_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); |
| 342 | //U8G2_SSD1306_64X32_1F_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); |
| 343 | //U8G2_SSD1306_96X16_ER_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // EastRising 0.69" OLED |
| 344 | //U8G2_SSD1306_72X40_ER_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // EastRising 0.42" OLED |
| 345 | //U8G2_SSD1306_96X40_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); |
| 346 | //U8G2_SSD1306_96X39_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); |
| 347 | //U8G2_SSD1322_240X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 348 | //U8G2_SSD1322_TOPWIN_240X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 349 | //U8G2_SSD1322_NHD_256X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Enable U8G2_16BIT in u8g2.h |
| 350 | //U8G2_SSD1322_NHD_256X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Enable U8G2_16BIT in u8g2.h |
| 351 | //U8G2_SSD1322_ZJY_256X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Enable U8G2_16BIT in u8g2.h |
| 352 | //U8G2_SSD1322_ZJY_256X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Enable U8G2_16BIT in u8g2.h |
| 353 | //U8G2_SSD1362_256X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Enable U8G2_16BIT in u8g2.h |
| 354 | //U8G2_SSD1362_256X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Enable U8G2_16BIT in u8g2.h |
| 355 | //U8G2_SSD1362_206X36_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 356 | //U8G2_SSD1362_206X36_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 357 | //U8G2_SSD1363_256X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Enable U8G2_16BIT in u8g2.h |
| 358 | //U8G2_SSD1363_256X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Enable U8G2_16BIT in u8g2.h |
| 359 | //U8G2_SSD1322_NHD_128X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 360 | //U8G2_SSD1322_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 361 | //U8G2_SSD1325_NHD_128X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 362 | //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 363 | //U8G2_SSD0323_OS128064_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 364 | //U8G2_SSD0323_OS128064_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 365 | //U8G2_SSD1326_ER_256X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // experimental driver for ER-OLED018-1 |
| 366 | //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 |
| 367 | //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 |
| 368 | //U8G2_SSD1327_EA_W128128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 369 | //U8G2_SSD1327_EA_W128128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 370 | //U8G2_SSD1327_EA_W128128_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ 5, /* data=*/ 4, /* reset=*/ U8X8_PIN_NONE); |
| 371 | //U8G2_SSD1327_EA_W128128_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); /* Uno: A4=SDA, A5=SCL, add "u8g2.setBusClock(400000);" into setup() for speedup if possible */ |
| 372 | //U8G2_SSD1327_MIDAS_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 373 | //U8G2_SSD1327_MIDAS_128X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 374 | //U8G2_SSD1327_MIDAS_128X128_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); /* Uno: A4=SDA, A5=SCL, add "u8g2.setBusClock(400000);" into setup() for speedup if possible */ |
| 375 | //U8G2_SSD1327_ZJY_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 376 | //U8G2_SSD1327_ZJY_128X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 377 | //U8G2_SSD1327_ZJY_128X128_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); /* Uno: A4=SDA, A5=SCL, add "u8g2.setBusClock(400000);" into setup() for speedup if possible */ |
| 378 | //U8G2_SSD1327_WS_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 379 | //U8G2_SSD1327_WS_128X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 380 | //U8G2_SSD1327_VISIONOX_128X96_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 381 | //U8G2_SSD1327_VISIONOX_128X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 382 | //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 383 | //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 384 | //U8G2_SSD1329_96X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 385 | //U8G2_SSD1329_96X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 386 | //U8G2_SSD1329_96X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ A4, /* dc=*/ A2, /* reset=*/ U8X8_PIN_NONE); // Adafruit Feather 32u4 Basic Proto |
| 387 | //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 388 | //U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 389 | //U8G2_SSD1305_128X32_ADAFRUIT_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 390 | //U8G2_SSD1305_128X32_ADAFRUIT_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 391 | //U8G2_SSD1305_128X64_ADAFRUIT_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 392 | //U8G2_SSD1305_128X64_ADAFRUIT_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 393 | //U8G2_SSD1305_128X64_RAYSTAR_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 394 | //U8G2_SSD1305_128X64_RAYSTAR_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 395 | //U8G2_SSD1309_128X64_NONAME0_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 396 | //U8G2_SSD1309_128X64_NONAME0_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 397 | //U8G2_SSD1309_128X128_NONAME0_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 398 | //U8G2_SSD1309_128X128_NONAME0_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 399 | //U8G2_SSD1309_128X64_NONAME2_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 400 | //U8G2_SSD1309_128X64_NONAME2_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 401 | //U8G2_SSD1316_128X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 402 | //U8G2_SSD1316_128X32_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 403 | //U8G2_SSD1316_96X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 404 | //U8G2_SSD1316_96X32_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 405 | //U8G2_SSD1317_96X96_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // not tested, not confirmed |
| 406 | //U8G2_SSD1317_96X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // not tested, not confirmed |
| 407 | //U8G2_SSD1318_128X96_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 408 | //U8G2_SSD1318_128X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 409 | //U8G2_SSD1320_160X132_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 410 | //U8G2_SSD1320_160X132_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 411 | //U8G2_SSD1320_160X80_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 412 | //U8G2_SSD1320_160X80_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 413 | //U8G2_SSD1320_128X72_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 414 | //U8G2_SSD1320_128X72_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 415 | //U8G2_LD7032_60X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 11, /* data=*/ 12, /* cs=*/ 9, /* dc=*/ 10, /* reset=*/ 8); // SW SPI Nano Board |
| 416 | //U8G2_LD7032_60X32_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ 11, /* data=*/ 12, /* reset=*/ U8X8_PIN_NONE); // NOT TESTED! |
| 417 | //U8G2_LD7032_60X32_ALT_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 11, /* data=*/ 12, /* cs=*/ 9, /* dc=*/ 10, /* reset=*/ 8); // SW SPI Nano Board |
| 418 | //U8G2_LD7032_60X32_ALT_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ 11, /* data=*/ 12, /* reset=*/ U8X8_PIN_NONE); // NOT TESTED! |
| 419 | //U8G2_LD7032_128X36_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 11, /* data=*/ 12, /* cs=*/ 9, /* dc=*/ 10, /* reset=*/ 8); // SW SPI Nano Board |
| 420 | //U8G2_LD7032_128X36_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ 11, /* data=*/ 12, /* reset=*/ U8X8_PIN_NONE); // NOT TESTED! |
| 421 | //U8G2_UC1701_EA_DOGS102_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 422 | //U8G2_UC1701_EA_DOGS102_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 423 | //U8G2_PCD8544_84X48_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Nokia 5110 Display |
| 424 | //U8G2_PCD8544_84X48_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Nokia 5110 Display |
| 425 | //U8G2_PCF8812_96X65_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Could be also PCF8814 |
| 426 | //U8G2_PCF8812_96X65_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Could be also PCF8814 |
| 427 | //U8G2_PCF8812_101X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Could be also PCF8814 |
| 428 | //U8G2_PCF8812_101X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Could be also PCF8814 |
| 429 | //U8G2_HX1230_96X68_1_3W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* reset=*/ 8); |
| 430 | //U8G2_HX1230_96X68_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 431 | //U8G2_KS0108_128X64_1 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*dc=*/ 17, /*cs0=*/ 14, /*cs1=*/ 15, /*cs2=*/ U8X8_PIN_NONE, /* reset=*/ U8X8_PIN_NONE); // Set R/W to low! |
| 432 | //U8G2_KS0108_ERM19264_1 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*dc=*/ 17, /*cs0=*/ 14, /*cs1=*/ 15, /*cs2=*/ 16, /* reset=*/ U8X8_PIN_NONE); // Set R/W to low! |
| 433 | //U8G2_HD44102_100X64_1 u8g2(U8G2_R0, 4, 5, 6, 7, 8, 9, 10, 11, /*enable=*/ 2, /*dc=*/ 3, /*cs0=*/ A0, /*cs1=*/ A1, /*cs2=*/ A2, /* reset=*/ U8X8_PIN_NONE); // Set R/W to low! |
| 434 | //U8G2_T7932_150X32_1 u8g2(U8G2_R0, 4, 5, 6, 7, 8, 9, 10, 11, /*enable=*/ 2, /*dc=*/ 3, /*cs0=*/ A0, /*cs1=*/ A1, /*cs2=*/ A2, /* reset=*/ U8X8_PIN_NONE); // Set R/W to low! |
| 435 | //U8G2_ST7920_256X32_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*cs=*/ U8X8_PIN_NONE, /*dc=*/ 17, /*reset=*/ U8X8_PIN_NONE); |
| 436 | //U8G2_ST7920_256X32_1_SW_SPI u8g2(U8G2_R0, /* clock=*/ 18 /* A4 */ , /* data=*/ 16 /* A2 */, /* CS=*/ 17 /* A3 */, /* reset=*/ U8X8_PIN_NONE); |
| 437 | //U8G2_ST7920_192X32_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*cs=*/ U8X8_PIN_NONE, /*dc=*/ 17, /*reset=*/ U8X8_PIN_NONE); |
| 438 | //U8G2_ST7920_192X32_1_SW_SPI u8g2(U8G2_R0, /* clock=*/ 18 /* A4 */ , /* data=*/ 16 /* A2 */, /* CS=*/ 17 /* A3 */, /* reset=*/ U8X8_PIN_NONE); |
| 439 | //U8G2_ST7920_128X32_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*cs=*/ U8X8_PIN_NONE, /*dc=*/ 17, /*reset=*/ U8X8_PIN_NONE); |
| 440 | //U8G2_ST7920_128X32_1_SW_SPI u8g2(U8G2_R0, /* clock=*/ 18 /* A4 */ , /* data=*/ 16 /* A2 */, /* CS=*/ 17 /* A3 */, /* reset=*/ U8X8_PIN_NONE); |
| 441 | //U8G2_ST7920_144X32_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*cs=*/ U8X8_PIN_NONE, /*dc=*/ 17, /*reset=*/ U8X8_PIN_NONE); |
| 442 | //U8G2_ST7920_144X32_1_SW_SPI u8g2(U8G2_R0, /* clock=*/ 18 /* A4 */ , /* data=*/ 16 /* A2 */, /* CS=*/ 17 /* A3 */, /* reset=*/ U8X8_PIN_NONE); |
| 443 | //U8G2_ST7920_160X32_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*cs=*/ U8X8_PIN_NONE, /*dc=*/ 17, /*reset=*/ U8X8_PIN_NONE); |
| 444 | //U8G2_ST7920_160X32_1_SW_SPI u8g2(U8G2_R0, /* clock=*/ 18 /* A4 */ , /* data=*/ 16 /* A2 */, /* CS=*/ 17 /* A3 */, /* reset=*/ U8X8_PIN_NONE); |
| 445 | //U8G2_ST7920_128X64_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18 /* A4 */, /*cs=*/ U8X8_PIN_NONE, /*dc/rs=*/ 17 /* A3 */, /*reset=*/ 15 /* A1 */); // Remember to set R/W to 0 |
| 446 | //U8G2_ST7920_128X64_1_SW_SPI u8g2(U8G2_R0, /* clock=*/ 18 /* A4 */ , /* data=*/ 16 /* A2 */, /* CS=*/ 17 /* A3 */, /* reset=*/ U8X8_PIN_NONE); |
| 447 | //U8G2_ST7920_128X64_1_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* CS=*/ 10, /* reset=*/ 8); |
| 448 | //U8G2_ST7920_128X64_1_SW_SPI u8g2(U8G2_R0, /* clock=*/ 14, /* data=*/ 13, /* CS=*/ 15, /* reset=*/ 16); // Feather HUZZAH ESP8266, E=clock=14, RW=data=13, RS=CS |
| 449 | //U8G2_ST7920_128X64_1_HW_SPI u8g2(U8G2_R0, /* CS=*/ 10, /* reset=*/ 8); |
| 450 | //U8G2_ST7920_128X64_1_HW_SPI u8g2(U8G2_R0, /* CS=*/ 15, /* reset=*/ 16); // Feather HUZZAH ESP8266, E=clock=14, RW=data=13, RS=CS |
| 451 | //U8G2_ST7528_ERC16064_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 452 | //U8G2_ST7528_ERC16064_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 453 | //U8G2_ST7539_192X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 454 | //U8G2_ST7539_192X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 455 | //U8G2_ST7565_EA_DOGM128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 456 | //U8G2_ST7565_EA_DOGM128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 457 | //U8G2_ST7565_64128N_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 458 | //U8G2_ST7565_64128N_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 459 | //U8G2_ST7565_EA_DOGM132_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ U8X8_PIN_NONE); // DOGM132 Shield |
| 460 | //U8G2_ST7565_EA_DOGM132_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ U8X8_PIN_NONE); // DOGM132 Shield |
| 461 | //U8G2_ST7565_ZOLEN_128X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 462 | //U8G2_ST7565_ZOLEN_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 463 | //U8G2_ST7565_LM6059_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Adafruit ST7565 GLCD |
| 464 | //U8G2_ST7565_LM6059_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Adafruit ST7565 GLCD |
| 465 | //U8G2_ST7565_KS0713_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // KS0713 controller |
| 466 | //U8G2_ST7565_KS0713_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // KS0713 controller |
| 467 | //U8G2_ST7565_LX12864_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 468 | //U8G2_ST7565_LX12864_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 469 | //U8G2_ST7565_ERC12864_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 470 | //U8G2_ST7565_ERC12864_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 471 | //U8G2_ST7565_ERC12864_ALT_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // contrast improved version for ERC12864 |
| 472 | //U8G2_ST7565_ERC12864_ALT_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // contrast improved version for ERC12864 |
| 473 | //U8G2_ST7565_NHD_C12832_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 474 | //U8G2_ST7565_NHD_C12832_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 475 | //U8G2_ST7565_NHD_C12864_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 476 | //U8G2_ST7565_NHD_C12864_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 477 | //U8G2_ST7565_JLX12864_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 478 | //U8G2_ST7565_JLX12864_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 479 | //U8G2_ST7567_PI_132X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 7, /* dc=*/ 9, /* reset=*/ 8); // Pax Instruments Shield, LCD_BL=6 |
| 480 | //U8G2_ST7567_PI_132X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 7, /* dc=*/ 9, /* reset=*/ 8); // Pax Instruments Shield, LCD_BL=6 |
| 481 | //U8G2_ST7567_JLX12864_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 7, /* dc=*/ 9, /* reset=*/ 8); |
| 482 | //U8G2_ST7567_JLX12864_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 7, /* dc=*/ 9, /* reset=*/ 8); |
| 483 | //U8G2_ST7567_122X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 7, /* dc=*/ 9, /* reset=*/ 8); |
| 484 | //U8G2_ST7567_122X32_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 7, /* dc=*/ 9, /* reset=*/ 8); |
| 485 | //U8G2_ST7567_OS12864_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 7, /* dc=*/ 9, /* reset=*/ 8); |
| 486 | //U8G2_ST7567_OS12864_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 7, /* dc=*/ 9, /* reset=*/ 8); |
| 487 | //U8G2_ST7567_ENH_DG128064_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 488 | //U8G2_ST7567_ENH_DG128064_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 489 | //U8G2_ST7567_ENH_DG128064I_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 490 | //U8G2_ST7567_ENH_DG128064I_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 491 | //U8G2_ST7567_64X32_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); |
| 492 | //U8G2_ST7567_HEM6432_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); |
| 493 | //U8G2_ST7567_ERC13232_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 494 | //U8G2_ST7567_ERC13232_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 495 | //U8G2_ST7567_96X65_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 496 | //U8G2_ST7567_96X65_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 497 | //U8G2_ST7571_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 498 | //U8G2_ST7571_128X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 499 | //U8G2_ST7571_128X96_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 500 | //U8G2_ST7571_128X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 501 | //U8G2_ST7571_G12896_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 502 | //U8G2_ST7571_G12896_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 503 | //U8G2_ST7302_122X250_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 504 | //U8G2_ST7305_122X250_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 505 | //U8G2_ST7305_200X200_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 506 | //U8G2_ST7305_168X384_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 507 | //U8G2_ST7305_300X400_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 508 | //U8G2_ST7586S_JLX384160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno: Enable U8g2 16 bit mode for this display |
| 509 | //U8G2_ST7586S_ERC240160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 510 | //U8G2_ST7586S_YMC240160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 511 | //U8G2_ST7586S_JLX320160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno: Enable U8g2 16 bit mode for this display |
| 512 | //U8G2_ST75160_JM16096_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 513 | //U8G2_ST75160_JM16096_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 514 | //U8G2_ST75161_JLX160160_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 515 | //U8G2_ST75161_JLX160160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 516 | //U8G2_ST75256_JLX172104_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 517 | //U8G2_ST75256_JLX172104_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 518 | //U8G2_ST75256_JLX19296_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 519 | //U8G2_ST75256_JLX19296_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 520 | //U8G2_ST75256_JLX16080_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 521 | //U8G2_ST75256_JLX16080_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 522 | //U8G2_ST75256_JLX256128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display |
| 523 | //U8G2_ST75256_JLX256128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display |
| 524 | //U8G2_ST75256_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display |
| 525 | //U8G2_ST75256_128X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display |
| 526 | //U8G2_ST75256_WO256X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display |
| 527 | //U8G2_ST75256_WO256X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display |
| 528 | //U8G2_ST75256_JLX256128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 9, /* data=*/ 8, /* cs=*/ 7, /* dc=*/ 6, /* reset=*/ 5); // MKR Zero, Enable U8g2 16 bit mode for this display |
| 529 | //U8G2_ST75256_JLX256128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 7, /* dc=*/ 6, /* reset=*/ 5); // MKR Zero, Enable U8g2 16 bit mode for this display |
| 530 | //U8G2_ST75256_JLX256160_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display |
| 531 | //U8G2_ST75256_JLX256160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display |
| 532 | //U8G2_ST75256_JLX256160M_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display |
| 533 | //U8G2_ST75256_JLX256160M_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display |
| 534 | //U8G2_ST75256_JLX256160_ALT_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display |
| 535 | //U8G2_ST75256_JLX256160_ALT_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display |
| 536 | //U8G2_ST75256_JLX240160_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 537 | //U8G2_ST75256_JLX240160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 538 | //U8G2_ST75256_JLX25664_1_2ND_HW_I2C u8g2(U8G2_R0, /* reset=*/ 8); // Due, 2nd I2C, enable U8g2 16 bit mode for this display |
| 539 | //U8G2_ST75320_JLX320240_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display |
| 540 | //U8G2_ST75320_JLX320240_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display |
| 541 | //U8G2_NT7534_TG12864R_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 542 | //U8G2_NT7534_TG12864R_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 543 | //U8G2_ST7588_JLX12864_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ 5); |
| 544 | //U8G2_ST7588_JLX12864_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ 5); |
| 545 | //U8G2_IST3020_ERC19264_1_6800 u8g2(U8G2_R0, 44, 43, 42, 41, 40, 39, 38, 37, /*enable=*/ 28, /*cs=*/ 32, /*dc=*/ 30, /*reset=*/ 31); // Connect WR pin with GND |
| 546 | //U8G2_IST3020_ERC19264_1_8080 u8g2(U8G2_R0, 44, 43, 42, 41, 40, 39, 38, 37, /*enable=*/ 29, /*cs=*/ 32, /*dc=*/ 30, /*reset=*/ 31); // Connect RD pin with 3.3V |
| 547 | //U8G2_IST3020_ERC19264_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 548 | //U8G2_IST3088_320X240_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 549 | //U8G2_IST3088_320X240_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 550 | //U8G2_IST7920_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Round display |
| 551 | //U8G2_IST7920_128X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Round display |
| 552 | //U8G2_LC7981_160X80_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RW with GND |
| 553 | //U8G2_LC7981_160X160_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RW with GND |
| 554 | //U8G2_LC7981_240X128_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RW with GND |
| 555 | //U8G2_LC7981_240X64_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RW with GND |
| 556 | //U8G2_LC7981_128X128_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RW with GND |
| 557 | //U8G2_SED1520_122X32_1 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*dc=*/ A0, /*e1=*/ A3, /*e2=*/ A2, /* reset=*/ A4); // Set R/W to low! |
| 558 | //U8G2_T6963_240X128_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable/wr=*/ 17, /*cs/ce=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RD with +5V, FS0 and FS1 with GND |
| 559 | //U8G2_T6963_256X64_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable/wr=*/ 17, /*cs/ce=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RD with +5V, FS0 and FS1 with GND |
| 560 | //U8G2_T6963_160X80_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable/wr=*/ 17, /*cs/ce=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RD with +5V, FS0 and FS1 with GND |
| 561 | //U8G2_T6963_128X64_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable/wr=*/ 17, /*cs/ce=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RD with +5V, FS0 and FS1 with GND |
| 562 | //U8G2_T6963_128X64_ALT_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable/wr=*/ 17, /*cs/ce=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RD with +5V, FS0 and FS1 with GND |
| 563 | //U8G2_T6963_128X160_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable/wr=*/ 17, /*cs/ce=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RD with +5V, FS0 and FS1 with GND |
| 564 | //U8G2_SED1330_240X64_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 17, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect /RD = E with +5V, enable is /WR = RW, FG with GND, 14=Uno Pin A0 |
| 565 | //U8G2_SED1330_240X128_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 17, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect /RD = E with +5V, enable is /WR = RW, FG with GND, 14=Uno Pin A0 |
| 566 | //U8G2_SED1330_240X128_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 17, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // A0 is dc pin, /WR = RW = GND, enable is /RD = E |
| 567 | //U8G2_SED1330_256X128_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 17, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect /RD = E with +5V, enable is /WR = RW, FG with GND, 14=Uno Pin A0, enable U8g2 16Bit Mode |
| 568 | //U8G2_SED1330_256X128_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 17, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // A0 is dc pin, /WR = RW = GND, enable is /RD = E, enable U8g2 16Bit Mode |
| 569 | //U8G2_SED1330_320X200_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 17, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect /RD = E with +5V, enable is /WR = RW, FG with GND, 14=Uno Pin A0, enable U8g2 16Bit Mode |
| 570 | //U8G2_SED1330_320X200_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 17, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // A0 is dc pin, /WR = RW = GND, enable is /RD = E, enable U8g2 16Bit Mode |
| 571 | //U8G2_RA8835_NHD_240X128_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 17, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect /RD = E with +5V, enable is /WR = RW, FG with GND, 14=Uno Pin A0 |
| 572 | //U8G2_RA8835_NHD_240X128_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 17, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // A0 is dc pin, /WR = RW = GND, enable is /RD = E |
| 573 | //U8G2_UC1601_128X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 574 | //U8G2_UC1601_128X32_1_3W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* reset=*/ 8); |
| 575 | //U8G2_UC1601_128X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 576 | //U8G2_UC1604_JLX19264_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 577 | //U8G2_UC1604_JLX19264_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 578 | //U8G2_UC1609_SLG19264_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 579 | //U8G2_UC1609_SLG19264_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 580 | //U8G2_UC1608_ERC24064_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // SW SPI, Due ERC24064-1 Test Setup |
| 581 | //U8G2_UC1608_DEM240064_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // SW SPI, Due ERC24064-1 Test Setup |
| 582 | //U8G2_UC1608_ERC240120_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 583 | //U8G2_UC1608_240X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // SW SPI, Due ERC24064-1 Test Setup |
| 584 | //U8G2_UC1610_EA_DOGXL160_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ U8X8_PIN_NONE); |
| 585 | //U8G2_UC1610_EA_DOGXL160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ U8X8_PIN_NONE); |
| 586 | //U8G2_UC1611_EA_DOGM240_1_2ND_HW_I2C u8g2(U8G2_R0, /* reset=*/ 8); // Due, 2nd I2C, DOGM240 Test Board |
| 587 | //U8G2_UC1611_EA_DOGM240_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // SW SPI, Due DOGXL240 Test Board |
| 588 | //U8G2_UC1611_EA_DOGXL240_1_2ND_HW_I2C u8g2(U8G2_R0, /* reset=*/ 8); // Due, 2nd I2C, DOGXL240 Test Board |
| 589 | //U8G2_UC1611_EA_DOGXL240_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // SW SPI, Due DOGXL240 Test Board |
| 590 | //U8G2_UC1611_EW50850_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*cs=*/ 3, /*dc=*/ 16, /*reset=*/ 17); // 240x160, Connect RD/WR1 pin with 3.3V, CS is aktive high |
| 591 | //U8G2_UC1611_CG160160_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*cs=*/ 3, /*dc=*/ 16, /*reset=*/ 17); // Connect WR1 and CD1 pin with 3.3V, connect CS0 with cs, WR0 with enable, CD with dc |
| 592 | //U8G2_UC1611_IDS4073_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Enable U8g2 16Bit Mode |
| 593 | //U8G2_UC1611_IDS4073_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Enable U8g2 16Bit Mode |
| 594 | //U8G2_UC1617_JLX128128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 595 | //U8G2_UC1617_JLX128128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 596 | //U8G2_UC1628_128X64_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*cs=*/ 3, /*dc=*/ 16, /*reset=*/ 17); // UC1628 pin names: enable: /WR, dc: CD |
| 597 | //U8G2_UC1628_128X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 598 | //U8G2_UC1628_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 599 | //U8G2_UC1628_256X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 600 | //U8G2_UC1628_256X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 601 | //U8G2_UC1628_256X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 602 | //U8G2_UC1628_256X32_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 603 | //U8G2_UC1638_192X96_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 604 | //U8G2_UC1638_192X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 605 | //U8G2_UC1638_192X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* reset=*/ 8); // u8g2 test board: I2C clock/data is same as SPI, I2C default address is 0x78 |
| 606 | //U8G2_UC1638_240X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 607 | //U8G2_UC1638_240X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 608 | //U8G2_UC1638_240X128_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* reset=*/ 8); // u8g2 test board: I2C clock/data is same as SPI, I2C default address is 0x78 |
| 609 | //U8G2_UC1698_160X160_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 610 | //U8G2_UC1698_160X160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 611 | //U8G2_SSD1606_172X72_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // eInk/ePaper Display |
| 612 | //U8G2_SSD1607_200X200_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // eInk/ePaper Display, original LUT from embedded artists |
| 613 | //U8G2_SSD1607_GD_200X200_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Good Display |
| 614 | //U8G2_SSD1607_WS_200X200_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Waveshare |
| 615 | //U8G2_IL3820_296X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // WaveShare 2.9 inch eInk/ePaper Display, enable 16 bit mode for this display! |
| 616 | //U8G2_IL3820_V2_296X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // ePaper Display, lesser flickering and faster speed, enable 16 bit mode for this display! |
| 617 | //U8G2_LS013B7DH03_128X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ U8X8_PIN_NONE, /* reset=*/ 8); // there is no DC line for this display |
| 618 | //U8G2_LS027B7DH01_400X240_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ U8X8_PIN_NONE, /* reset=*/ 8); // there is no DC line for this display, SPI Mode 2 |
| 619 | //U8G2_LS027B7DH01_M0_400X240_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ U8X8_PIN_NONE, /* reset=*/ 8); // there is no DC line for this display, SPI Mode 0 |
| 620 | //U8G2_LS013B7DH05_144X168_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ U8X8_PIN_NONE, /* reset=*/ 8); // there is no DC line for this display |
| 621 | //U8G2_ST7511_AVD_320X240_1_8080 u8g2(U8G2_R0, 13, 11, 2, 3, 4, 5, 6, A4, /*enable/WR=*/ 7, /*cs=*/ 10, /*dc=*/ 9, /*reset=*/ 8); // Enable U8g2 16Bit Mode and connect RD pin with 3.3V/5V |
| 622 | //U8G2_ST7511_640X320_1_8080 u8g2(U8G2_R0, 13, 11, 2, 3, 4, 5, 6, A4, /*enable/WR=*/ 7, /*cs=*/ 10, /*dc=*/ 9, /*reset=*/ 8); // Enable U8g2 16Bit Mode and connect RD pin with 3.3V/5V |
| 623 | //U8G2_S1D15300_LM6023_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 624 | //U8G2_S1D15300_LM6023_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 625 | //U8G2_S1D15300_100X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 626 | //U8G2_S1D15300_100X32_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 627 | //U8G2_S1D15300_100X32I_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 628 | //U8G2_S1D15300_100X32I_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 629 | //U8G2_S1D15721_240X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 630 | //U8G2_S1D15721_240X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 631 | //U8G2_GU800_128X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 632 | //U8G2_GU800_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 633 | //U8G2_GU800_160X16_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 634 | //U8G2_GU800_160X16_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); |
| 635 | //U8G2_GP1294AI_256X48_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/10, /* dc=*/U8X8_PIN_NONE, /* reset=*/8); |
| 636 | |
| 637 | |
| 638 | |
| 639 | |
| 640 | // End of constructor list |
| 641 | |
| 642 | typedef u8g2_uint_t u8g_uint_t; |
| 643 | |
| 644 | |
| 645 | static const unsigned char u8g2_logo_97x51_bits[] U8X8_PROGMEM = { |
| 646 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 647 | 0x00, 0x3c, 0x80, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x00, |
| 648 | 0x00, 0x00, 0x3c, 0x80, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, |
| 649 | 0x03, 0x00, 0x00, 0x3c, 0x80, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 650 | 0xff, 0x03, 0x00, 0x00, 0x3c, 0x80, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 651 | 0x80, 0xcf, 0x07, 0x00, 0x00, 0x3c, 0x80, 0x07, 0x00, 0x00, 0x00, 0x00, |
| 652 | 0x00, 0x80, 0x83, 0x07, 0x00, 0x00, 0x3c, 0x80, 0x07, 0xf8, 0x00, 0x00, |
| 653 | 0x00, 0x00, 0x00, 0x81, 0x07, 0x00, 0x00, 0x3c, 0x80, 0x07, 0xfc, 0x03, |
| 654 | 0x1c, 0x00, 0x3e, 0x1c, 0xc0, 0x03, 0x00, 0x00, 0x3c, 0x80, 0x07, 0xff, |
| 655 | 0x07, 0x7f, 0x80, 0xff, 0x3f, 0xe0, 0x01, 0x00, 0x00, 0x3c, 0x80, 0x07, |
| 656 | 0xff, 0x8f, 0xff, 0xc1, 0xff, 0x3f, 0xf0, 0x00, 0x00, 0x00, 0x3c, 0x80, |
| 657 | 0x87, 0xff, 0xdf, 0xff, 0xc1, 0xc3, 0x07, 0x7c, 0x00, 0x00, 0x00, 0x3c, |
| 658 | 0x80, 0x87, 0x0f, 0xfe, 0xff, 0xe3, 0x81, 0x03, 0x1e, 0x00, 0x00, 0x00, |
| 659 | 0x3c, 0x80, 0xc7, 0x07, 0xfc, 0xe3, 0xe3, 0x81, 0x07, 0x0f, 0x00, 0x00, |
| 660 | 0x00, 0x3c, 0x80, 0xc7, 0x07, 0xf8, 0xc1, 0xe7, 0x81, 0x87, 0xff, 0x07, |
| 661 | 0x00, 0x00, 0x3c, 0x80, 0xc7, 0x03, 0xf0, 0x80, 0xe7, 0xc3, 0x87, 0xff, |
| 662 | 0x07, 0x00, 0x00, 0x3c, 0x80, 0xc7, 0x03, 0x70, 0x80, 0xc7, 0xe7, 0x83, |
| 663 | 0xff, 0x07, 0x00, 0x00, 0x3c, 0x80, 0xc7, 0x03, 0x78, 0x80, 0xc7, 0xff, |
| 664 | 0x03, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x80, 0xc7, 0x03, 0xf8, 0xc0, 0x87, |
| 665 | 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x80, 0xc7, 0x07, 0xfc, 0xc1, |
| 666 | 0xc7, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0xc0, 0x87, 0x0f, 0xfe, |
| 667 | 0xff, 0xe3, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0xc0, 0x83, 0xff, |
| 668 | 0xdf, 0xff, 0xe3, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xf1, 0x03, |
| 669 | 0xff, 0x8f, 0xff, 0xe1, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, |
| 670 | 0x01, 0xfe, 0x0f, 0xff, 0xc0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0xe0, |
| 671 | 0xff, 0x00, 0xfc, 0x03, 0x7c, 0xc0, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, |
| 672 | 0x80, 0x3f, 0x00, 0xf8, 0x01, 0x00, 0xe0, 0x01, 0x1e, 0x00, 0x00, 0x00, |
| 673 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x1e, 0x00, 0x00, |
| 674 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x1e, 0x00, |
| 675 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0xf0, 0xc7, 0x0f, |
| 676 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0xe0, 0xff, |
| 677 | 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0xc0, |
| 678 | 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 679 | 0x01, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0xff, |
| 680 | 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 681 | 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 682 | 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 683 | 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 684 | 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 685 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 686 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 687 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, |
| 688 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, |
| 689 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 690 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 691 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 692 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 693 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x24, 0x20, 0x00, |
| 694 | 0x00, 0x08, 0x46, 0x02, 0x00, 0x80, 0xc0, 0x40, 0x00, 0x0c, 0x6e, 0x6a, |
| 695 | 0xc0, 0xa4, 0x48, 0x04, 0xaa, 0xac, 0x8c, 0xaa, 0xac, 0x00, 0x6a, 0xa4, |
| 696 | 0xaa, 0x20, 0xea, 0xa4, 0x64, 0x66, 0xaa, 0x46, 0x4a, 0x8a, 0x00, 0x4c, |
| 697 | 0xa4, 0xaa, 0x20, 0xaa, 0xa2, 0x44, 0x2a, 0xaa, 0x28, 0xaa, 0x4c, 0x00, |
| 698 | 0xe8, 0xa8, 0x6c, 0xc4, 0xa4, 0x42, 0xee, 0x2a, 0xcc, 0x26, 0x6c, 0xe8, |
| 699 | 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 700 | 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 701 | 0x00, 0x00, 0x00 }; |
| 702 | |
| 703 | |
| 704 | |
| 705 | #define SECONDS 10 |
| 706 | uint8_t flip_color = 0; |
| 707 | uint8_t draw_color = 1; |
| 708 | |
| 709 | void draw_set_screen(void) { |
| 710 | // graphic commands to redraw the complete screen should be placed here |
| 711 | u8g2.setColorIndex(flip_color); |
| 712 | u8g2.drawBox( 0, 0, u8g2.getWidth(), u8g2.getHeight() ); |
| 713 | } |
| 714 | |
| 715 | void draw_clip_test(void) { |
| 716 | u8g_uint_t i, j, k; |
| 717 | char buf[3] = "AB"; |
| 718 | k = 0; |
| 719 | u8g2.setColorIndex(draw_color); |
| 720 | u8g2.setFont(u8g2_font_6x10_tf); |
| 721 | |
| 722 | for( i = 0; i < 6; i++ ) { |
| 723 | for( j = 1; j < 8; j++ ) { |
| 724 | u8g2.drawHLine(i-3, k, j); |
| 725 | u8g2.drawHLine(i-3+10, k, j); |
| 726 | |
| 727 | u8g2.drawVLine(k+20, i-3, j); |
| 728 | u8g2.drawVLine(k+20, i-3+10, j); |
| 729 | |
| 730 | k++; |
| 731 | } |
| 732 | } |
| 733 | u8g2.setFontDirection(0); |
| 734 | u8g2.drawStr(0-3, 50, buf); |
| 735 | u8g2.setFontDirection(2); |
| 736 | u8g2.drawStr(0+3, 50, buf); |
| 737 | |
| 738 | u8g2.setFontDirection(0); |
| 739 | u8g2.drawStr(u8g2.getWidth()-3, 40, buf); |
| 740 | u8g2.setFontDirection(2); |
| 741 | u8g2.drawStr(u8g2.getWidth()+3, 40, buf); |
| 742 | |
| 743 | u8g2.setFontDirection(1); |
| 744 | u8g2.drawStr(u8g2.getWidth()-10, 0-3, buf); |
| 745 | u8g2.setFontDirection(3); |
| 746 | u8g2.drawStr(u8g2.getWidth()-10, 3, buf); |
| 747 | |
| 748 | u8g2.setFontDirection(1); |
| 749 | u8g2.drawStr(u8g2.getWidth()-20, u8g2.getHeight()-3, buf); |
| 750 | u8g2.setFontDirection(3); |
| 751 | u8g2.drawStr(u8g2.getWidth()-20, u8g2.getHeight()+3, buf); |
| 752 | |
| 753 | u8g2.setFontDirection(0); |
| 754 | |
| 755 | } |
| 756 | |
| 757 | void draw_char(void) { |
| 758 | char buf[2] = "@"; |
| 759 | u8g_uint_t i, j; |
| 760 | // graphic commands to redraw the complete screen should be placed here |
| 761 | u8g2.setColorIndex(draw_color); |
| 762 | u8g2.setFont(u8g2_font_6x10_tf); |
| 763 | j = 8; |
| 764 | for(;;) { |
| 765 | i = 0; |
| 766 | for(;;) { |
| 767 | u8g2.drawStr( i, j, buf); |
| 768 | i += 8; |
| 769 | if ( i > u8g2.getWidth() ) |
| 770 | break; |
| 771 | } |
| 772 | j += 8; |
| 773 | if ( j > u8g2.getHeight() ) |
| 774 | break; |
| 775 | } |
| 776 | } |
| 777 | |
| 778 | void draw_pixel(void) { |
| 779 | u8g_uint_t x, y, w2, h2; |
| 780 | u8g2.setColorIndex(draw_color); |
| 781 | w2 = u8g2.getWidth(); |
| 782 | h2 = u8g2.getHeight(); |
| 783 | w2 /= 2; |
| 784 | h2 /= 2; |
| 785 | for( y = 0; y < h2; y++ ) { |
| 786 | for( x = 0; x < w2; x++ ) { |
| 787 | if ( (x + y) & 1 ) { |
| 788 | u8g2.drawPixel(x,y); |
| 789 | u8g2.drawPixel(x,y+h2); |
| 790 | u8g2.drawPixel(x+w2,y); |
| 791 | u8g2.drawPixel(x+w2,y+h2); |
| 792 | } |
| 793 | } |
| 794 | } |
| 795 | } |
| 796 | |
| 797 | void draw_xbm(void) { |
| 798 | u8g2.drawXBMP(0,0,97,51, u8g2_logo_97x51_bits); |
| 799 | } |
| 800 | |
| 801 | |
| 802 | |
| 803 | |
| 804 | // returns unadjusted FPS |
| 805 | uint16_t picture_loop_with_fps(void (*draw_fn)(void)) { |
| 806 | uint16_t FPS10 = 0; |
| 807 | uint32_t time; |
| 808 | |
| 809 | time = millis() + SECONDS*1000; |
| 810 | |
| 811 | // picture loop |
| 812 | do { |
| 813 | u8g2.firstPage(); |
| 814 | do { |
| 815 | draw_fn(); |
| 816 | } while( u8g2.nextPage() ); |
| 817 | FPS10++; |
| 818 | flip_color = flip_color ^ 1; |
| 819 | } while( millis() < time ); |
| 820 | return FPS10; |
| 821 | } |
| 822 | |
| 823 | const char *convert_FPS(uint16_t fps) { |
| 824 | static char buf[6]; |
| 825 | strcpy(buf, u8g2_u8toa( (uint8_t)(fps/10), 3)); |
| 826 | buf[3] = '.'; |
| 827 | buf[4] = (fps % 10) + '0'; |
| 828 | buf[5] = '\0'; |
| 829 | return buf; |
| 830 | } |
| 831 | |
| 832 | void show_result(const char *s, uint16_t fps) { |
| 833 | // assign default color value |
| 834 | u8g2.setColorIndex(draw_color); |
| 835 | u8g2.setFont(u8g2_font_8x13B_tf); |
| 836 | u8g2.firstPage(); |
| 837 | do { |
| 838 | u8g2.drawStr(0,12, s); |
| 839 | u8g2.drawStr(0,24, convert_FPS(fps)); |
| 840 | } while( u8g2.nextPage() ); |
| 841 | } |
| 842 | |
| 843 | void setup(void) { |
| 844 | |
| 845 | /* U8g2 Project: SSD1306 Test Board */ |
| 846 | //pinMode(10, OUTPUT); |
| 847 | //pinMode(9, OUTPUT); |
| 848 | //digitalWrite(10, 0); |
| 849 | //digitalWrite(9, 0); |
| 850 | |
| 851 | /* U8g2 Project: T6963 Test Board */ |
| 852 | //pinMode(18, OUTPUT); |
| 853 | //digitalWrite(18, 1); |
| 854 | |
| 855 | /* U8g2 Project: KS0108 Test Board */ |
| 856 | //pinMode(16, OUTPUT); |
| 857 | //digitalWrite(16, 0); |
| 858 | |
| 859 | /* U8g2 Project: LC7981 Test Board, connect RW to GND */ |
| 860 | //pinMode(17, OUTPUT); |
| 861 | //digitalWrite(17, 0); |
| 862 | |
| 863 | u8g2.begin(); |
| 864 | |
| 865 | |
| 866 | // flip screen, if required |
| 867 | // u8g2.setRot180(); |
| 868 | |
| 869 | |
| 870 | // assign default color value |
| 871 | draw_color = 1; // pixel on |
| 872 | |
| 873 | } |
| 874 | |
| 875 | void loop(void) { |
| 876 | uint16_t fps; |
| 877 | /* |
| 878 | fps = picture_loop_with_fps(draw_clip_test); |
| 879 | show_result("draw clip test", fps); |
| 880 | delay(5000); |
| 881 | fps = picture_loop_with_fps(draw_set_screen); |
| 882 | show_result("clear screen", fps); |
| 883 | delay(5000); |
| 884 | fps = picture_loop_with_fps(draw_char); |
| 885 | show_result("draw @", fps); |
| 886 | delay(5000); |
| 887 | fps = picture_loop_with_fps(draw_pixel); |
| 888 | show_result("draw pixel", fps); |
| 889 | delay(5000); |
| 890 | */ |
| 891 | |
| 892 | fps = picture_loop_with_fps(draw_xbm); |
| 893 | show_result("draw xbm", fps); |
| 894 | delay(5000); |
| 895 | |
| 896 | } |
| 897 | |