| 1 | /* |
| 2 | |
| 3 | u8x8_byte.c |
| 4 | |
| 5 | Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/) |
| 6 | |
| 7 | Copyright (c) 2016, olikraus@gmail.com |
| 8 | All rights reserved. |
| 9 | |
| 10 | Redistribution and use in source and binary forms, with or without modification, |
| 11 | are permitted provided that the following conditions are met: |
| 12 | |
| 13 | * Redistributions of source code must retain the above copyright notice, this list |
| 14 | of conditions and the following disclaimer. |
| 15 | |
| 16 | * Redistributions in binary form must reproduce the above copyright notice, this |
| 17 | list of conditions and the following disclaimer in the documentation and/or other |
| 18 | materials provided with the distribution. |
| 19 | |
| 20 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND |
| 21 | CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, |
| 22 | INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 23 | MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 24 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR |
| 25 | CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 26 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 27 | NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 28 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| 29 | CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
| 30 | STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 31 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF |
| 32 | ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 33 | |
| 34 | |
| 35 | */ |
| 36 | |
| 37 | #include "u8x8.h" |
| 38 | |
| 39 | uint8_t u8x8_byte_SetDC(u8x8_t *u8x8, uint8_t dc) |
| 40 | { |
| 41 | return u8x8->byte_cb(u8x8, U8X8_MSG_BYTE_SET_DC, dc, NULL); |
| 42 | } |
| 43 | |
| 44 | uint8_t u8x8_byte_SendBytes(u8x8_t *u8x8, uint8_t cnt, uint8_t *data) |
| 45 | { |
| 46 | return u8x8->byte_cb(u8x8, U8X8_MSG_BYTE_SEND, cnt, (void *)data); |
| 47 | } |
| 48 | |
| 49 | uint8_t u8x8_byte_SendByte(u8x8_t *u8x8, uint8_t byte) |
| 50 | { |
| 51 | return u8x8_byte_SendBytes(u8x8, 1, &byte); |
| 52 | } |
| 53 | |
| 54 | uint8_t u8x8_byte_StartTransfer(u8x8_t *u8x8) |
| 55 | { |
| 56 | return u8x8->byte_cb(u8x8, U8X8_MSG_BYTE_START_TRANSFER, 0, NULL); |
| 57 | } |
| 58 | |
| 59 | uint8_t u8x8_byte_EndTransfer(u8x8_t *u8x8) |
| 60 | { |
| 61 | return u8x8->byte_cb(u8x8, U8X8_MSG_BYTE_END_TRANSFER, 0, NULL); |
| 62 | } |
| 63 | |
| 64 | /*=========================================*/ |
| 65 | |
| 66 | uint8_t u8x8_byte_empty(U8X8_UNUSED u8x8_t *u8x8, uint8_t msg, U8X8_UNUSED uint8_t arg_int, U8X8_UNUSED void *arg_ptr) |
| 67 | { |
| 68 | switch(msg) |
| 69 | { |
| 70 | case U8X8_MSG_BYTE_SEND: |
| 71 | case U8X8_MSG_BYTE_INIT: |
| 72 | case U8X8_MSG_BYTE_SET_DC: |
| 73 | case U8X8_MSG_BYTE_START_TRANSFER: |
| 74 | case U8X8_MSG_BYTE_END_TRANSFER: |
| 75 | break; /* do nothing */ |
| 76 | } |
| 77 | return 1; /* always succeed */ |
| 78 | } |
| 79 | |
| 80 | |
| 81 | /*=========================================*/ |
| 82 | |
| 83 | |
| 84 | /* |
| 85 | Uses: |
| 86 | u8x8->display_info->sda_setup_time_ns |
| 87 | u8x8->display_info->sck_pulse_width_ns |
| 88 | u8x8->display_info->spi_mode |
| 89 | u8x8->display_info->chip_disable_level |
| 90 | u8x8->display_info->chip_enable_level |
| 91 | u8x8->display_info->post_chip_enable_wait_ns |
| 92 | u8x8->display_info->pre_chip_disable_wait_ns |
| 93 | Calls to GPIO and DELAY: |
| 94 | U8X8_MSG_DELAY_NANO |
| 95 | U8X8_MSG_GPIO_DC |
| 96 | U8X8_MSG_GPIO_CS |
| 97 | U8X8_MSG_GPIO_CLOCK |
| 98 | U8X8_MSG_GPIO_DATA |
| 99 | Handles: |
| 100 | U8X8_MSG_BYTE_INIT |
| 101 | U8X8_MSG_BYTE_SEND |
| 102 | U8X8_MSG_BYTE_SET_DC |
| 103 | U8X8_MSG_BYTE_START_TRANSFER |
| 104 | U8X8_MSG_BYTE_END_TRANSFER |
| 105 | */ |
| 106 | |
| 107 | uint8_t u8x8_byte_4wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
| 108 | { |
| 109 | uint8_t i, b; |
| 110 | uint8_t *data; |
| 111 | uint8_t takeover_edge = u8x8_GetSPIClockPhase(u8x8); |
| 112 | uint8_t not_takeover_edge = 1 - takeover_edge; |
| 113 | |
| 114 | switch(msg) |
| 115 | { |
| 116 | case U8X8_MSG_BYTE_SEND: |
| 117 | data = (uint8_t *)arg_ptr; |
| 118 | while( arg_int > 0 ) |
| 119 | { |
| 120 | b = *data; |
| 121 | data++; |
| 122 | arg_int--; |
| 123 | for( i = 0; i < 8; i++ ) |
| 124 | { |
| 125 | if ( b & 128 ) |
| 126 | u8x8_gpio_SetSPIData(u8x8, 1); |
| 127 | else |
| 128 | u8x8_gpio_SetSPIData(u8x8, 0); |
| 129 | b <<= 1; |
| 130 | |
| 131 | u8x8_gpio_SetSPIClock(u8x8, not_takeover_edge); |
| 132 | u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->sda_setup_time_ns); |
| 133 | u8x8_gpio_SetSPIClock(u8x8, takeover_edge); |
| 134 | u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->sck_pulse_width_ns); |
| 135 | } |
| 136 | } |
| 137 | break; |
| 138 | |
| 139 | case U8X8_MSG_BYTE_INIT: |
| 140 | /* disable chipselect */ |
| 141 | u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); |
| 142 | /* no wait required here */ |
| 143 | |
| 144 | /* for SPI: setup correct level of the clock signal */ |
| 145 | u8x8_gpio_SetSPIClock(u8x8, u8x8_GetSPIClockPhase(u8x8)); |
| 146 | break; |
| 147 | case U8X8_MSG_BYTE_SET_DC: |
| 148 | u8x8_gpio_SetDC(u8x8, arg_int); |
| 149 | break; |
| 150 | case U8X8_MSG_BYTE_START_TRANSFER: |
| 151 | u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level); |
| 152 | u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL); |
| 153 | break; |
| 154 | case U8X8_MSG_BYTE_END_TRANSFER: |
| 155 | u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL); |
| 156 | u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); |
| 157 | break; |
| 158 | default: |
| 159 | return 0; |
| 160 | } |
| 161 | return 1; |
| 162 | } |
| 163 | |
| 164 | /*=========================================*/ |
| 165 | |
| 166 | uint8_t u8x8_byte_8bit_6800mode(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
| 167 | { |
| 168 | uint8_t i, b; |
| 169 | uint8_t *data; |
| 170 | |
| 171 | switch(msg) |
| 172 | { |
| 173 | case U8X8_MSG_BYTE_SEND: |
| 174 | data = (uint8_t *)arg_ptr; |
| 175 | while( arg_int > 0 ) |
| 176 | { |
| 177 | b = *data; |
| 178 | data++; |
| 179 | arg_int--; |
| 180 | for( i = U8X8_MSG_GPIO_D0; i <= U8X8_MSG_GPIO_D7; i++ ) |
| 181 | { |
| 182 | u8x8_gpio_call(u8x8, i, b&1); |
| 183 | b >>= 1; |
| 184 | } |
| 185 | |
| 186 | u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->data_setup_time_ns); |
| 187 | u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_E, 1); |
| 188 | u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->write_pulse_width_ns); |
| 189 | u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_E, 0); |
| 190 | } |
| 191 | break; |
| 192 | |
| 193 | case U8X8_MSG_BYTE_INIT: |
| 194 | /* disable chipselect */ |
| 195 | u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); |
| 196 | /* ensure that the enable signal is high */ |
| 197 | u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_E, 0); |
| 198 | break; |
| 199 | case U8X8_MSG_BYTE_SET_DC: |
| 200 | u8x8_gpio_SetDC(u8x8, arg_int); |
| 201 | break; |
| 202 | case U8X8_MSG_BYTE_START_TRANSFER: |
| 203 | u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level); |
| 204 | u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL); |
| 205 | break; |
| 206 | case U8X8_MSG_BYTE_END_TRANSFER: |
| 207 | u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL); |
| 208 | u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); |
| 209 | break; |
| 210 | default: |
| 211 | return 0; |
| 212 | } |
| 213 | return 1; |
| 214 | } |
| 215 | |
| 216 | uint8_t u8x8_byte_8bit_8080mode(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
| 217 | { |
| 218 | uint8_t i, b; |
| 219 | uint8_t *data; |
| 220 | |
| 221 | switch(msg) |
| 222 | { |
| 223 | case U8X8_MSG_BYTE_SEND: |
| 224 | data = (uint8_t *)arg_ptr; |
| 225 | while( arg_int > 0 ) |
| 226 | { |
| 227 | b = *data; |
| 228 | data++; |
| 229 | arg_int--; |
| 230 | for( i = U8X8_MSG_GPIO_D0; i <= U8X8_MSG_GPIO_D7; i++ ) |
| 231 | { |
| 232 | u8x8_gpio_call(u8x8, i, b&1); |
| 233 | b >>= 1; |
| 234 | } |
| 235 | |
| 236 | u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->data_setup_time_ns); |
| 237 | u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_E, 0); |
| 238 | u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->write_pulse_width_ns); |
| 239 | u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_E, 1); |
| 240 | } |
| 241 | break; |
| 242 | |
| 243 | case U8X8_MSG_BYTE_INIT: |
| 244 | /* disable chipselect */ |
| 245 | u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); |
| 246 | /* ensure that the enable signal is high */ |
| 247 | u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_E, 1); |
| 248 | break; |
| 249 | case U8X8_MSG_BYTE_SET_DC: |
| 250 | u8x8_gpio_SetDC(u8x8, arg_int); |
| 251 | break; |
| 252 | case U8X8_MSG_BYTE_START_TRANSFER: |
| 253 | u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level); |
| 254 | u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL); |
| 255 | break; |
| 256 | case U8X8_MSG_BYTE_END_TRANSFER: |
| 257 | u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL); |
| 258 | u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); |
| 259 | break; |
| 260 | default: |
| 261 | return 0; |
| 262 | } |
| 263 | return 1; |
| 264 | } |
| 265 | |
| 266 | /*=========================================*/ |
| 267 | |
| 268 | uint8_t u8x8_byte_3wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
| 269 | { |
| 270 | uint8_t i; |
| 271 | uint8_t *data; |
| 272 | uint8_t takeover_edge = u8x8_GetSPIClockPhase(u8x8); |
| 273 | uint8_t not_takeover_edge = 1 - takeover_edge; |
| 274 | uint16_t b; |
| 275 | static uint8_t last_dc; |
| 276 | |
| 277 | switch(msg) |
| 278 | { |
| 279 | case U8X8_MSG_BYTE_SEND: |
| 280 | data = (uint8_t *)arg_ptr; |
| 281 | while( arg_int > 0 ) |
| 282 | { |
| 283 | b = *data; |
| 284 | if ( last_dc != 0 ) |
| 285 | b |= 256; |
| 286 | data++; |
| 287 | arg_int--; |
| 288 | for( i = 0; i < 9; i++ ) |
| 289 | { |
| 290 | if ( b & 256 ) |
| 291 | u8x8_gpio_SetSPIData(u8x8, 1); |
| 292 | else |
| 293 | u8x8_gpio_SetSPIData(u8x8, 0); |
| 294 | b <<= 1; |
| 295 | |
| 296 | u8x8_gpio_SetSPIClock(u8x8, not_takeover_edge); |
| 297 | u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->sda_setup_time_ns); |
| 298 | u8x8_gpio_SetSPIClock(u8x8, takeover_edge); |
| 299 | u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->sck_pulse_width_ns); |
| 300 | } |
| 301 | } |
| 302 | break; |
| 303 | |
| 304 | case U8X8_MSG_BYTE_INIT: |
| 305 | /* disable chipselect */ |
| 306 | u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); |
| 307 | /* no wait required here */ |
| 308 | |
| 309 | /* for SPI: setup correct level of the clock signal */ |
| 310 | u8x8_gpio_SetSPIClock(u8x8, u8x8_GetSPIClockPhase(u8x8)); |
| 311 | break; |
| 312 | case U8X8_MSG_BYTE_SET_DC: |
| 313 | last_dc = arg_int; |
| 314 | break; |
| 315 | case U8X8_MSG_BYTE_START_TRANSFER: |
| 316 | u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level); |
| 317 | u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL); |
| 318 | break; |
| 319 | case U8X8_MSG_BYTE_END_TRANSFER: |
| 320 | u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL); |
| 321 | u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); |
| 322 | break; |
| 323 | default: |
| 324 | return 0; |
| 325 | } |
| 326 | return 1; |
| 327 | } |
| 328 | |
| 329 | /*=========================================*/ |
| 330 | |
| 331 | void u8x8_byte_set_ks0108_cs(u8x8_t *u8x8, uint8_t arg) |
| 332 | { |
| 333 | u8x8_gpio_SetCS(u8x8, arg&1); |
| 334 | arg = arg >> 1; |
| 335 | u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_CS1, arg&1); |
| 336 | arg = arg >> 1; |
| 337 | u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_CS2, arg&1); |
| 338 | } |
| 339 | |
| 340 | /* 6800 mode */ |
| 341 | uint8_t u8x8_byte_ks0108(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
| 342 | { |
| 343 | uint8_t i, b; |
| 344 | uint8_t *data; |
| 345 | |
| 346 | switch(msg) |
| 347 | { |
| 348 | case U8X8_MSG_BYTE_SEND: |
| 349 | data = (uint8_t *)arg_ptr; |
| 350 | while( arg_int > 0 ) |
| 351 | { |
| 352 | b = *data; |
| 353 | data++; |
| 354 | arg_int--; |
| 355 | for( i = U8X8_MSG_GPIO_D0; i <= U8X8_MSG_GPIO_D7; i++ ) |
| 356 | { |
| 357 | u8x8_gpio_call(u8x8, i, b&1); |
| 358 | b >>= 1; |
| 359 | } |
| 360 | |
| 361 | u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->data_setup_time_ns); |
| 362 | u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_E, 1); |
| 363 | u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->write_pulse_width_ns); |
| 364 | u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_E, 0); |
| 365 | } |
| 366 | break; |
| 367 | |
| 368 | case U8X8_MSG_BYTE_INIT: |
| 369 | /* disable chipselect */ |
| 370 | u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); |
| 371 | /* ensure that the enable signal is low */ |
| 372 | u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_E, 0); |
| 373 | break; |
| 374 | case U8X8_MSG_BYTE_SET_DC: |
| 375 | u8x8_gpio_SetDC(u8x8, arg_int); |
| 376 | break; |
| 377 | case U8X8_MSG_BYTE_START_TRANSFER: |
| 378 | /* expects 3 bits in arg_int for the chip select lines */ |
| 379 | u8x8_byte_set_ks0108_cs(u8x8, arg_int); |
| 380 | u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL); |
| 381 | break; |
| 382 | case U8X8_MSG_BYTE_END_TRANSFER: |
| 383 | u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL); |
| 384 | u8x8_byte_set_ks0108_cs(u8x8, arg_int); |
| 385 | break; |
| 386 | default: |
| 387 | return 0; |
| 388 | } |
| 389 | return 1; |
| 390 | } |
| 391 | |
| 392 | |
| 393 | /* sed1520 or sbn1661 |
| 394 | U8X8_MSG_GPIO_E --> E1 |
| 395 | U8X8_MSG_GPIO_CS --> E2 |
| 396 | */ |
| 397 | uint8_t u8x8_byte_sed1520(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
| 398 | { |
| 399 | uint8_t i, b; |
| 400 | uint8_t *data; |
| 401 | static uint8_t enable_pin; |
| 402 | |
| 403 | switch(msg) |
| 404 | { |
| 405 | case U8X8_MSG_BYTE_SEND: |
| 406 | data = (uint8_t *)arg_ptr; |
| 407 | while( arg_int > 0 ) |
| 408 | { |
| 409 | b = *data; |
| 410 | data++; |
| 411 | arg_int--; |
| 412 | for( i = U8X8_MSG_GPIO_D0; i <= U8X8_MSG_GPIO_D7; i++ ) |
| 413 | { |
| 414 | u8x8_gpio_call(u8x8, i, b&1); |
| 415 | b >>= 1; |
| 416 | } |
| 417 | |
| 418 | u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->data_setup_time_ns); |
| 419 | u8x8_gpio_call(u8x8, enable_pin, 1); |
| 420 | u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, 200); /* KS0108 requires 450 ns, use 200 here */ |
| 421 | u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->write_pulse_width_ns); /* expect 250 here */ |
| 422 | u8x8_gpio_call(u8x8, enable_pin, 0); |
| 423 | } |
| 424 | break; |
| 425 | |
| 426 | case U8X8_MSG_BYTE_INIT: |
| 427 | /* disable chipselect */ |
| 428 | u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); |
| 429 | /* ensure that the enable signals are low */ |
| 430 | u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_E, 0); |
| 431 | u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_CS, 0); |
| 432 | enable_pin = U8X8_MSG_GPIO_E; |
| 433 | break; |
| 434 | case U8X8_MSG_BYTE_SET_DC: |
| 435 | u8x8_gpio_SetDC(u8x8, arg_int); |
| 436 | break; |
| 437 | case U8X8_MSG_BYTE_START_TRANSFER: |
| 438 | /* cs lines are not supported for the SED1520/SBN1661 */ |
| 439 | /* instead, this will select the E1 or E2 line */ |
| 440 | /* arg_int is set by u8x8_d_sbn1661_122x32() function */ |
| 441 | enable_pin = U8X8_MSG_GPIO_E; |
| 442 | if ( arg_int != 0 ) |
| 443 | enable_pin = U8X8_MSG_GPIO_CS; |
| 444 | break; |
| 445 | case U8X8_MSG_BYTE_END_TRANSFER: |
| 446 | break; |
| 447 | default: |
| 448 | return 0; |
| 449 | } |
| 450 | return 1; |
| 451 | } |
| 452 | |
| 453 | /*=========================================*/ |
| 454 | |
| 455 | |
| 456 | /* |
| 457 | software i2c, |
| 458 | ignores ACK response (which is anyway not provided by some displays) |
| 459 | also does not allow reading from the device |
| 460 | */ |
| 461 | static void i2c_delay(u8x8_t *u8x8) U8X8_NOINLINE; |
| 462 | static void i2c_delay(u8x8_t *u8x8) |
| 463 | { |
| 464 | //u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_10MICRO, u8x8->display_info->i2c_bus_clock_100kHz); |
| 465 | u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_I2C, u8x8->display_info->i2c_bus_clock_100kHz); |
| 466 | } |
| 467 | |
| 468 | static void i2c_init(u8x8_t *u8x8) |
| 469 | { |
| 470 | u8x8_gpio_SetI2CClock(u8x8, 1); |
| 471 | u8x8_gpio_SetI2CData(u8x8, 1); |
| 472 | |
| 473 | i2c_delay(u8x8); |
| 474 | } |
| 475 | |
| 476 | /* actually, the scl line is not observed, so this procedure does not return a value */ |
| 477 | |
| 478 | static void i2c_read_scl_and_delay(u8x8_t *u8x8) |
| 479 | { |
| 480 | /* set as input (line will be high) */ |
| 481 | u8x8_gpio_SetI2CClock(u8x8, 1); |
| 482 | |
| 483 | i2c_delay(u8x8); |
| 484 | } |
| 485 | |
| 486 | static void i2c_clear_scl(u8x8_t *u8x8) |
| 487 | { |
| 488 | u8x8_gpio_SetI2CClock(u8x8, 0); |
| 489 | } |
| 490 | |
| 491 | static void i2c_read_sda(u8x8_t *u8x8) |
| 492 | { |
| 493 | /* set as input (line will be high) */ |
| 494 | u8x8_gpio_SetI2CData(u8x8, 1); |
| 495 | } |
| 496 | |
| 497 | static void i2c_clear_sda(u8x8_t *u8x8) |
| 498 | { |
| 499 | /* set open collector and drive low */ |
| 500 | u8x8_gpio_SetI2CData(u8x8, 0); |
| 501 | } |
| 502 | |
| 503 | static void i2c_start(u8x8_t *u8x8) |
| 504 | { |
| 505 | if ( u8x8->i2c_started != 0 ) |
| 506 | { |
| 507 | /* if already started: do restart */ |
| 508 | i2c_read_sda(u8x8); /* SDA = 1 */ |
| 509 | i2c_delay(u8x8); |
| 510 | i2c_read_scl_and_delay(u8x8); |
| 511 | } |
| 512 | i2c_read_sda(u8x8); |
| 513 | /* send the start condition, both lines go from 1 to 0 */ |
| 514 | i2c_clear_sda(u8x8); |
| 515 | i2c_delay(u8x8); |
| 516 | i2c_clear_scl(u8x8); |
| 517 | u8x8->i2c_started = 1; |
| 518 | } |
| 519 | |
| 520 | |
| 521 | static void i2c_stop(u8x8_t *u8x8) |
| 522 | { |
| 523 | /* set SDA to 0 */ |
| 524 | i2c_clear_sda(u8x8); |
| 525 | i2c_delay(u8x8); |
| 526 | |
| 527 | /* now release all lines */ |
| 528 | i2c_read_scl_and_delay(u8x8); |
| 529 | |
| 530 | /* set SDA to 1 */ |
| 531 | i2c_read_sda(u8x8); |
| 532 | i2c_delay(u8x8); |
| 533 | u8x8->i2c_started = 0; |
| 534 | } |
| 535 | |
| 536 | static void i2c_write_bit(u8x8_t *u8x8, uint8_t val) |
| 537 | { |
| 538 | if (val) |
| 539 | i2c_read_sda(u8x8); |
| 540 | else |
| 541 | i2c_clear_sda(u8x8); |
| 542 | |
| 543 | i2c_delay(u8x8); |
| 544 | i2c_read_scl_and_delay(u8x8); |
| 545 | i2c_clear_scl(u8x8); |
| 546 | } |
| 547 | |
| 548 | static void i2c_read_bit(u8x8_t *u8x8) |
| 549 | { |
| 550 | //uint8_t val; |
| 551 | /* do not drive SDA */ |
| 552 | i2c_read_sda(u8x8); |
| 553 | i2c_delay(u8x8); |
| 554 | i2c_read_scl_and_delay(u8x8); |
| 555 | i2c_read_sda(u8x8); |
| 556 | i2c_delay(u8x8); |
| 557 | i2c_clear_scl(u8x8); |
| 558 | //return val; |
| 559 | } |
| 560 | |
| 561 | static void i2c_write_byte(u8x8_t *u8x8, uint8_t b) |
| 562 | { |
| 563 | i2c_write_bit(u8x8, b & 128); |
| 564 | i2c_write_bit(u8x8, b & 64); |
| 565 | i2c_write_bit(u8x8, b & 32); |
| 566 | i2c_write_bit(u8x8, b & 16); |
| 567 | i2c_write_bit(u8x8, b & 8); |
| 568 | i2c_write_bit(u8x8, b & 4); |
| 569 | i2c_write_bit(u8x8, b & 2); |
| 570 | i2c_write_bit(u8x8, b & 1); |
| 571 | |
| 572 | /* read ack from client */ |
| 573 | /* 0: ack was given by client */ |
| 574 | /* 1: nothing happend during ack cycle */ |
| 575 | i2c_read_bit(u8x8); |
| 576 | } |
| 577 | |
| 578 | uint8_t u8x8_byte_sw_i2c(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
| 579 | { |
| 580 | uint8_t *data; |
| 581 | |
| 582 | switch(msg) |
| 583 | { |
| 584 | case U8X8_MSG_BYTE_SEND: |
| 585 | data = (uint8_t *)arg_ptr; |
| 586 | |
| 587 | while( arg_int > 0 ) |
| 588 | { |
| 589 | i2c_write_byte(u8x8, *data); |
| 590 | data++; |
| 591 | arg_int--; |
| 592 | } |
| 593 | |
| 594 | break; |
| 595 | |
| 596 | case U8X8_MSG_BYTE_INIT: |
| 597 | i2c_init(u8x8); |
| 598 | break; |
| 599 | case U8X8_MSG_BYTE_SET_DC: |
| 600 | break; |
| 601 | case U8X8_MSG_BYTE_START_TRANSFER: |
| 602 | i2c_start(u8x8); |
| 603 | i2c_write_byte(u8x8, u8x8_GetI2CAddress(u8x8)); |
| 604 | //i2c_write_byte(u8x8, 0x078); |
| 605 | break; |
| 606 | case U8X8_MSG_BYTE_END_TRANSFER: |
| 607 | i2c_stop(u8x8); |
| 608 | break; |
| 609 | default: |
| 610 | return 0; |
| 611 | } |
| 612 | return 1; |
| 613 | } |
| 614 | |
| 615 | /*=========================================*/ |
| 616 | |
| 617 | /* alternative i2c byte procedure */ |
| 618 | #ifdef ALTERNATIVE_I2C_BYTE_PROCEDURE |
| 619 | |
| 620 | |
| 621 | void i2c_transfer(u8x8_t *u8x8, uint8_t adr, uint8_t cnt, uint8_t *data) |
| 622 | { |
| 623 | uint8_t i; |
| 624 | i2c_start(u8x8); |
| 625 | i2c_write_byte(u8x8, adr); |
| 626 | for( i = 0; i < cnt; i++ ) |
| 627 | i2c_write_byte(u8x8, data[i]); |
| 628 | i2c_stop(u8x8); |
| 629 | } |
| 630 | |
| 631 | |
| 632 | uint8_t u8x8_byte_sw_i2c(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
| 633 | { |
| 634 | static uint8_t buffer[32]; /* u8g2/u8x8 will never send more than 32 bytes */ |
| 635 | static uint8_t buf_idx; |
| 636 | uint8_t *data; |
| 637 | |
| 638 | switch(msg) |
| 639 | { |
| 640 | case U8X8_MSG_BYTE_SEND: |
| 641 | data = (uint8_t *)arg_ptr; |
| 642 | while( arg_int > 0 ) |
| 643 | { |
| 644 | buffer[buf_idx++] = *data; |
| 645 | data++; |
| 646 | arg_int--; |
| 647 | } |
| 648 | break; |
| 649 | case U8X8_MSG_BYTE_INIT: |
| 650 | i2c_init(u8x8); /* init i2c communication */ |
| 651 | break; |
| 652 | case U8X8_MSG_BYTE_SET_DC: |
| 653 | /* ignored for i2c */ |
| 654 | break; |
| 655 | case U8X8_MSG_BYTE_START_TRANSFER: |
| 656 | buf_idx = 0; |
| 657 | break; |
| 658 | case U8X8_MSG_BYTE_END_TRANSFER: |
| 659 | i2c_transfer(u8x8, u8x8_GetI2CAddress(u8x8), buf_idx, buffer); |
| 660 | break; |
| 661 | default: |
| 662 | return 0; |
| 663 | } |
| 664 | return 1; |
| 665 | } |
| 666 | |
| 667 | #endif |