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orion-rf.piolibdepsesp32-s3-n16r8RF24nRF24L01.h

139 lines · 4.4 KB · Objective-C

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1/*
2 Copyright (c) 2007 Stefan Engelke <mbox@stefanengelke.de>
3 Portions Copyright (C) 2011 Greg Copeland
4
5 Permission is hereby granted, free of charge, to any person
6 obtaining a copy of this software and associated documentation
7 files (the "Software"), to deal in the Software without
8 restriction, including without limitation the rights to use, copy,
9 modify, merge, publish, distribute, sublicense, and/or sell copies
10 of the Software, and to permit persons to whom the Software is
11 furnished to do so, subject to the following conditions:
12
13 The above copyright notice and this permission notice shall be
14 included in all copies or substantial portions of the Software.
15
16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
20 HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
21 WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 DEALINGS IN THE SOFTWARE.
24*/
25
26#ifndef NRF24L01_H_
27#define NRF24L01_H_
28
29#include <stdint.h>
30
31namespace nRF24L01 {
32
33/* Memory Map */
34constexpr uint8_t CONFIG = 0x00;
35constexpr uint8_t EN_AA = 0x01;
36constexpr uint8_t EN_RXADDR = 0x02;
37constexpr uint8_t SETUP_AW = 0x03;
38constexpr uint8_t SETUP_RETR = 0x04;
39constexpr uint8_t RF_CH = 0x05;
40constexpr uint8_t RF_SETUP = 0x06;
41constexpr uint8_t STATUS = 0x07;
42constexpr uint8_t OBSERVE_TX = 0x08;
43constexpr uint8_t CD = 0x09;
44constexpr uint8_t RX_ADDR_P0 = 0x0A;
45constexpr uint8_t RX_ADDR_P1 = 0x0B;
46constexpr uint8_t RX_ADDR_P2 = 0x0C;
47constexpr uint8_t RX_ADDR_P3 = 0x0D;
48constexpr uint8_t RX_ADDR_P4 = 0x0E;
49constexpr uint8_t RX_ADDR_P5 = 0x0F;
50constexpr uint8_t TX_ADDR = 0x10;
51constexpr uint8_t RX_PW_P0 = 0x11;
52constexpr uint8_t RX_PW_P1 = 0x12;
53constexpr uint8_t RX_PW_P2 = 0x13;
54constexpr uint8_t RX_PW_P3 = 0x14;
55constexpr uint8_t RX_PW_P4 = 0x15;
56constexpr uint8_t RX_PW_P5 = 0x16;
57constexpr uint8_t FIFO_STATUS = 0x17;
58constexpr uint8_t DYNPD = 0x1C;
59constexpr uint8_t FEATURE = 0x1D;
60
61/* Bit Mnemonics */
62constexpr uint8_t MASK_RX_DR = 6;
63constexpr uint8_t MASK_TX_DS = 5;
64constexpr uint8_t MASK_MAX_RT = 4;
65constexpr uint8_t EN_CRC = 3;
66constexpr uint8_t CRCO = 2;
67constexpr uint8_t PWR_UP = 1;
68constexpr uint8_t PRIM_RX = 0;
69constexpr uint8_t ENAA_P5 = 5;
70constexpr uint8_t ENAA_P4 = 4;
71constexpr uint8_t ENAA_P3 = 3;
72constexpr uint8_t ENAA_P2 = 2;
73constexpr uint8_t ENAA_P1 = 1;
74constexpr uint8_t ENAA_P0 = 0;
75constexpr uint8_t ERX_P5 = 5;
76constexpr uint8_t ERX_P4 = 4;
77constexpr uint8_t ERX_P3 = 3;
78constexpr uint8_t ERX_P2 = 2;
79constexpr uint8_t ERX_P1 = 1;
80constexpr uint8_t ERX_P0 = 0;
81constexpr uint8_t AW = 0;
82constexpr uint8_t ARD = 4;
83constexpr uint8_t ARC = 0;
84constexpr uint8_t PLL_LOCK = 4;
85constexpr uint8_t CONT_WAVE = 7;
86constexpr uint8_t RF_DR = 3;
87constexpr uint8_t RF_PWR = 6;
88constexpr uint8_t RX_DR = 6;
89constexpr uint8_t TX_DS = 5;
90constexpr uint8_t MAX_RT = 4;
91constexpr uint8_t RX_P_NO = 1;
92constexpr uint8_t TX_FULL = 0;
93constexpr uint8_t PLOS_CNT = 4;
94constexpr uint8_t ARC_CNT = 0;
95constexpr uint8_t TX_REUSE = 6;
96constexpr uint8_t FIFO_FULL = 5;
97constexpr uint8_t TX_EMPTY = 4;
98constexpr uint8_t RX_FULL = 1;
99constexpr uint8_t RX_EMPTY = 0;
100constexpr uint8_t DPL_P5 = 5;
101constexpr uint8_t DPL_P4 = 4;
102constexpr uint8_t DPL_P3 = 3;
103constexpr uint8_t DPL_P2 = 2;
104constexpr uint8_t DPL_P1 = 1;
105constexpr uint8_t DPL_P0 = 0;
106constexpr uint8_t EN_DPL = 2;
107constexpr uint8_t EN_ACK_PAY = 1;
108constexpr uint8_t EN_DYN_ACK = 0;
109
110/* Instruction Mnemonics */
111constexpr uint8_t R_REGISTER = 0x00;
112constexpr uint8_t W_REGISTER = 0x20;
113constexpr uint8_t REGISTER_MASK = 0x1F;
114constexpr uint8_t ACTIVATE = 0x50;
115constexpr uint8_t R_RX_PL_WID = 0x60;
116constexpr uint8_t R_RX_PAYLOAD = 0x61;
117constexpr uint8_t W_TX_PAYLOAD = 0xA0;
118constexpr uint8_t W_ACK_PAYLOAD = 0xA8;
119constexpr uint8_t FLUSH_TX = 0xE1;
120constexpr uint8_t FLUSH_RX = 0xE2;
121constexpr uint8_t REUSE_TX_PL = 0xE3;
122constexpr uint8_t NOP = 0xFF;
123
124/* Non-P omissions */
125constexpr uint8_t LNA_HCURR = 0;
126
127/* P model memory Map */
128constexpr uint8_t RPD = 0x09;
129constexpr uint8_t W_TX_PAYLOAD_NO_ACK = 0xB0;
130
131/* P model bit Mnemonics */
132constexpr uint8_t RF_DR_LOW = 5;
133constexpr uint8_t RF_DR_HIGH = 3;
134constexpr uint8_t RF_PWR_LOW = 1;
135constexpr uint8_t RF_PWR_HIGH = 2;
136
137} // namespace nRF24L01
138
139#endif // NRF24L01_H_