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orion-rf.piolibdepsesp32-s3-n16r8U8g2srcclibu8x8_d_ssd1362z.c

268 lines · 8.8 KB · C

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1/*
2 u8x8_d_ssd1362z.c
3
4 Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/)
5
6 Copyright (c) 2022, olikraus@gmail.com
7 All rights reserved.
8
9 Redistribution and use in source and binary forms, with or without modification,
10 are permitted provided that the following conditions are met:
11
12 * Redistributions of source code must retain the above copyright notice, this list
13 of conditions and the following disclaimer.
14
15 * Redistributions in binary form must reproduce the above copyright notice, this
16 list of conditions and the following disclaimer in the documentation and/or other
17 materials provided with the distribution.
18
19 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
20 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
21 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
24 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
29 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32
33 PMOLED TRULY OEL1M0033-W-E:
34 SSD1362Z:
35 256 x 64
36 4bit gray scale
37
38 Note: Currently the internal IREF is activated.
39 Without external VP capacitor
40
41*/
42#include "u8x8.h"
43
44static const uint8_t u8x8_d_ssd1362z_powersave0_seq[] = {
45 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
46 U8X8_C(0x0af), /* ssd1362z: display on */
47 U8X8_END_TRANSFER(), /* disable chip */
48 U8X8_END() /* end of sequence */
49};
50
51static const uint8_t u8x8_d_ssd1362z_powersave1_seq[] = {
52 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
53 U8X8_C(0x0ae), /* ssd1362z: display off */
54 U8X8_END_TRANSFER(), /* disable chip */
55 U8X8_END() /* end of sequence */
56};
57
58/*
59 input:
60 one tile (8 Bytes)
61 output:
62 Tile for SSD1362Z (32 Bytes)
63*/
64
65static uint8_t u8x8_ssd1362z_oel1m0033we_to32_dest_buf[32];
66
67static uint8_t *u8x8_ssd1362z_oel1m0033we_8to32(U8X8_UNUSED u8x8_t *u8x8, uint8_t *ptr)
68{
69 uint8_t v;
70 uint8_t a,b;
71 uint8_t i, j;
72 uint8_t *dest;
73
74 for( j = 0; j < 4; j++ )
75 {
76 dest = u8x8_ssd1362z_oel1m0033we_to32_dest_buf;
77 dest += j;
78 a =*ptr;
79 ptr++;
80 b = *ptr;
81 ptr++;
82 for( i = 0; i < 8; i++ )
83 {
84 v = 0;
85 if ( a&1 ) v |= 0xf0;
86 if ( b&1 ) v |= 0x0f;
87 *dest = v;
88 dest+=4;
89 a >>= 1;
90 b >>= 1;
91 }
92 }
93
94 return u8x8_ssd1362z_oel1m0033we_to32_dest_buf;
95}
96
97uint8_t u8x8_d_ssd1362z_common(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
98{
99 uint8_t x;
100 uint8_t y, c;
101 uint8_t *ptr;
102 switch(msg)
103 {
104 /* U8X8_MSG_DISPLAY_SETUP_MEMORY is handled by the calling function */
105 /*
106 case U8X8_MSG_DISPLAY_SETUP_MEMORY:
107 break;
108 case U8X8_MSG_DISPLAY_INIT:
109 u8x8_d_helper_display_init(u8x8);
110 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1362z_256x64_init_seq);
111 break;
112 */
113 case U8X8_MSG_DISPLAY_SET_POWER_SAVE:
114 if ( arg_int == 0 )
115 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1362z_powersave0_seq);
116 else
117 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1362z_powersave1_seq);
118 break;
119#ifdef U8X8_WITH_SET_CONTRAST
120 case U8X8_MSG_DISPLAY_SET_CONTRAST:
121 u8x8_cad_StartTransfer(u8x8);
122 u8x8_cad_SendCmd(u8x8, 0x081 );
123 u8x8_cad_SendArg(u8x8, arg_int ); /* ssd1362z has range from 0 to 255 */
124 u8x8_cad_EndTransfer(u8x8);
125 break;
126#endif
127 case U8X8_MSG_DISPLAY_DRAW_TILE:
128 u8x8_cad_StartTransfer(u8x8);
129 x = ((u8x8_tile_t *)arg_ptr)->x_pos;
130 x *= 4; // convert from tile pos to display column
131 x += u8x8->x_offset;
132
133 y = (((u8x8_tile_t *)arg_ptr)->y_pos);
134 y *= 8;
135
136
137 u8x8_cad_SendCmd(u8x8, 0x075 ); /* set row address, moved out of the loop (issue 302) */
138 u8x8_cad_SendArg(u8x8, y);
139 u8x8_cad_SendArg(u8x8, y+7);
140
141 do
142 {
143 c = ((u8x8_tile_t *)arg_ptr)->cnt;
144 ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr;
145
146 do
147 {
148 u8x8_cad_SendCmd(u8x8, 0x015 ); /* set column address */
149 u8x8_cad_SendArg(u8x8, x ); /* start */
150 u8x8_cad_SendArg(u8x8, x+3 ); /* end */
151 u8x8_cad_SendData(u8x8, 32, u8x8_ssd1362z_oel1m0033we_8to32(u8x8, ptr));
152
153 ptr += 8;
154 x += 4;
155 c--;
156 } while( c > 0 );
157
158 arg_int--;
159
160 } while( arg_int > 0 );
161
162 u8x8_cad_EndTransfer(u8x8);
163 break;
164 default:
165 return 0;
166 }
167 return 1;
168}
169
170/*=========================================================*/
171
172static const uint8_t u8x8_d_ssd1362z_256x64_flip0_seq[] = {
173 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
174 U8X8_CA(0xa0, 0xc3), //Set Remap c3 = 11000011
175
176 U8X8_END_TRANSFER(), /* disable chip */
177 U8X8_END() /* end of sequence */
178};
179
180static const uint8_t u8x8_d_ssd1362z_256x64_flip1_seq[] = {
181 U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
182 U8X8_CA(0xa0, 0xd0),
183 U8X8_END_TRANSFER(), /* disable chip */
184 U8X8_END() /* end of sequence */
185};
186
187static const u8x8_display_info_t u8x8_ssd1362z_oel1m0033we_256x64_display_info =
188{
189 /* chip_enable_level = */ 0,
190 /* chip_disable_level = */ 1,
191
192 /* post_chip_enable_wait_ns = */ 20,
193 /* pre_chip_disable_wait_ns = */ 10,
194 /* reset_pulse_width_ms = */ 100, /* ssd1362z: 2 us */
195 /* post_reset_wait_ms = */ 100, /* far east OLEDs need much longer setup time */
196 /* sda_setup_time_ns = */ 50, /* ssd1362z: 15ns, but cycle time is 100ns, so use 100/2 */
197 /* sck_pulse_width_ns = */ 50, /* ssd1362z: 20ns, but cycle time is 100ns, so use 100/2, AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */
198 /* sck_clock_hz = */ 10000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns, increased to 8MHz (issue 215), 10 MHz (issue 301) */
199 /* spi_mode = */ 0, /* active high, rising edge */
200 /* i2c_bus_clock_100kHz = */ 4,
201 /* data_setup_time_ns = */ 10,
202 /* write_pulse_width_ns = */ 150, /* ssd1362z: cycle time is 300ns, so use 300/2 = 150 */
203 /* tile_width = */ 32, /* 256 pixel, so we require 32 bytes for this */
204 /* tile_height = */ 8,
205 /* default_x_offset = */ 0, /* this is the byte offset (there are two pixel per byte with 4 bit per pixel) */
206 /* flipmode_x_offset = */ 0,
207 /* pixel_width = */ 256,
208 /* pixel_height = */ 64
209};
210
211static const uint8_t u8x8_d_ssd1362z_256x64_init_seq[] = {
212
213 U8X8_DLY(1),
214 U8X8_START_TRANSFER(), // enable chip, delay is part of the transfer start
215 U8X8_DLY(1),
216
217 U8X8_CA(0xfd, 0x12), // unlock
218 U8X8_C(0xae), // display off
219 U8X8_CA(0x81, 0x7f), // Set contrast: 127
220 U8X8_CA(0xa0, 0xc1),
221 U8X8_CA(0xa1, 0x00), // Set Display Start Line
222 U8X8_CA(0xa2, 0x00), // Set Display Offset
223 U8X8_C(0xa4), // Normal Display
224 U8X8_CA(0xa8, 0x3f), // Set Multiplex Ratio: (63 rows)
225 U8X8_CA(0xab, 0x01), // Enable VDD regulator
226 U8X8_CA(0xad, 0x9e), // External /Internal IREF Selection, 9e: internal, 8e: external
227 U8X8_CA(0xb1, 0x22), // Set Phase Length
228 U8X8_CA(0xb3, 0xa0), // Display clock Divider
229 U8X8_CA(0xb6, 0x04), // Set Second precharge Period
230 U8X8_C(0xb9), // Set Linear LUT
231 U8X8_CA(0xbc, 0x04), // Set pre-charge voltage level, 0..0x1f, 0x04 = 0.15*VCC
232 U8X8_CA(0xbd, 0x00), // Pre-charge voltage capacitor Selection, 0: without, 1: with Vp capacitor
233 U8X8_CA(0xbe, 0x05), // Set COM deselect voltage level, 5 = 0.82*VCC
234 U8X8_DLY(1), // delay 1ms
235
236 U8X8_END_TRANSFER(), // disable chip
237 U8X8_END() // end of sequence
238};
239
240uint8_t u8x8_d_ssd1362z_256x64_oel1m0033we(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
241{
242 switch(msg)
243 {
244 case U8X8_MSG_DISPLAY_SETUP_MEMORY:
245 u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1362z_oel1m0033we_256x64_display_info);
246 break;
247 case U8X8_MSG_DISPLAY_INIT:
248 u8x8_d_helper_display_init(u8x8);
249 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1362z_256x64_init_seq);
250 break;
251 case U8X8_MSG_DISPLAY_SET_FLIP_MODE:
252 if ( arg_int == 0 )
253 {
254 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1362z_256x64_flip0_seq);
255 u8x8->x_offset = u8x8->display_info->default_x_offset;
256 }
257 else
258 {
259 u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1362z_256x64_flip1_seq);
260 u8x8->x_offset = u8x8->display_info->flipmode_x_offset;
261 }
262 break;
263
264 default:
265 return u8x8_d_ssd1362z_common(u8x8, msg, arg_int, arg_ptr);
266 }
267 return 1;
268}